Agilent Technologies FS2010 user manual General Information, Characteristics

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General Information

Characteristics

State/Timing Adapter

Probe Interface

Compatibility

Card Edge Extender Connector

Standards Supported Power Requirements

Logic Analyzer Required

Number of Probes Used

Minimum Clock Period (State)

This chapter provides additional reference information including the characteristics and signal connections for the FS2010 module.

The following operating characteristics are not specifications, but are typical operating characteristics for the FS2010 module.

32 or 64 bit PCI-X Local bus universal connector pinout. All PCI-X local bus ground pins of the universal board pinout are connected to the ground plane of the FS2010 module.

The FS2010 extender card connector is a 3.3V, 64 bit connector that accepts either 3.3V or universal 32 or 64 bit long or short card form factor. All of the signals from the PCI-X bus are routed to the card edge extender connector.

The PCI-X Local Bus Specification Revision 1.0

The FS2010 State/Timing Adapter Probe logic contains no active components. The PCI-X add-in card installed in the FS2010 can draw power from the +/-12V, 3.3V and the 5V pins of the target as if it were installed without the FS2010.

Agilent 16715/6/7/9, 1674X, or 16750/1/2, 16953/4/5/6 installed in the 16700A or 16700B mainframe. Agilent 1680/90/900, 16953/4/5/6, 1691x, 1695x logic analyzers.

The State/Timing Adapter Probe interface uses 4 cable headers for 32 bit analysis and 6 for 64 bit analysis.

0 to 133Mhz

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Contents Page FS2010 Software and Timing mode J2 Signal Connector How to reach us Assistance Product WarrantyLimitation Warranty Introduction How to Use This ManualAnalyzing the PCI-X Local Bus Accessories SuppliedPage Configuration Files How to install a PCI-X add-in card into the FS2010 Connecting the 167xx Agilent logic analyzer to the FS2010Setting up the 167xx Analyzer 167xx Licensing 1680/90/900 Licensing Offline Analysis Page Page Format Menu PCI-X Transaction Decode Software FS2010 Software and Timing mode Cycle variable DEVSEL# TRDY# STOP# Acquiring Data State AnalysisConfiguring the Workspace for PCI-X Analysis State Listing Display Above figure shows the listing from the 169xx frame Name Base Description Functionality FS2010 Transaction Decode SoftwareTiming Analysis Waveform Display Use of EyeFinder/Eyescan Transaction Viewer General Information CharacteristicsState/Timing Adapter Probe interface pinout Signal ConnectionsJ2 Signal Connector INTD# J3 Signal Connections SERR# J4 Signal Connections Samtec