SUPER MICRO Computer X9DRG-HTF Active Processor Cores, Limit Cpuid Maximum, Intel AES-NI

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Chapter 4: AMI BIOS

Active Processor Cores

Set to Enabled to use a processor's second core and above. (Please refer to Intel's website for more information.) The options are All, 1, 2, 4 and 6.

Limit CPUID Maximum

This feature allows the user to set the maximum CPU ID value. Enable this function to boot the legacy operating systems that cannot support processors with extended CPUID functions. The options are Enabled and Disabled (for the Windows OS).

Execute-Disable Bit (Available if supported by the OS & the CPU)

Select Enabled to enable the Execute Disable Bit which will allow the processor to designate areas in the system memory where an application code can execute and where it cannot, thus preventing a worm or a virus from flooding illegal codes to overwhelm the processor or damage the system during an attack. The default is Enabled. (Refer to Intel and Microsoft Web sites for more information.)

Intel® AES-NI

Select Enable to use the Intel Advanced Encryption Standard (AES) New Instruc- tions (NI) to ensure data security. The options are Enabled and Disabled.

MLC Streamer Prefetcher (Available when supported by the CPU)

If set to Enabled, the MLC (mid-level cache) streamer prefetcher will prefetch streams of data and instructions from the main memory to the L2 cache to improve CPU performance. The options are Disabled and Enabled.

MLC Spatial Prefetch (Available when supported by the CPU)

If this feature is set to Disabled, The CPU prefetches the cache line for 64 bytes. If this feature is set to Enabled the CPU fetches both cache lines for 128 bytes as comprised. The options are Disabled and Enabled.

DCU Streamer Prefetcher (Available when supported by the CPU)

Select Enabled to support Data Cache Unite (DCU) prefetch of L1 data to speed up data accessing and processing in the DCU to enhance CPU performance. The options are Disabled and Enabled.

DCU IP Prefetcher

Select Enabled for DCU (Data Cache Unit) IP Prefetcher support, which will prefetch IP addresses to improve network connectivity and system performance. The options are Enabled and Disabled.

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Contents X9DRG-HF X9DRG-HTF Page About This Motherboard Manual Organization PrefaceConventions Used in the Manual Asia-Pacific Contacting SupermicroEurope Table of Contents Vii Appendix a Bios Error Beep Codes Overview ChecklistMotherboard Image Motherboard Layout PCH X9DRG-HF/X9DRG-HTF Quick ReferenceConnectors Description X9DRG-HF/X9DRG-HTF Jumpers Description Default SettingX9DRG-HF/X9DRG-HTF Connectors Description State Status X9DRG-HF/X9DRG-HTF LED IndicatorsCPU Motherboard FeaturesIpmi Sata ConnectionsSerial COM Port Super I/OFan Control DimensionsPCI-E X8 G3 System Block DiagramProcessor and Chipset Overview Recovery from AC Power Loss Special FeaturesEnvironmental Temperature Control PC Health MonitoringPower Supply Acpi FeaturesSlow Blinking LED for Suspend-State Indicator Super I/OIntel Intelligent Power Node Manager NM Advanced Power ManagementOverview of the Nuvoton WPCM450 Controller Management Engine MEWPCM450R PCI System Interface Other Features Supported by the Wpcm BMC ControllerWPCM450R DDR2 Memory Interface Page Standardized Warning Statements Battery HandlingPage 製品の廃棄 Product DisposalPage Installing the LGA2011 Processor Processor and Heatsink InstallationSocket Socket Keys CPU Keys Lever Lock Gently close the load plateMounting Holes Installing a Passive CPU HeatsinkScrew#1 Screw#2 Motherboard Removing the Heatsink Removing Memory Modules Installing and Removing the Memory ModulesInstalling & Removing DIMMs Processor and Memory Module Population Processors and their Corresponding Memory ModulesPopulating Udimm ECC/Non-ECC Memory Modules Intel E5-2600 Series Processor Udimm Memory Support Populating Lrdimm ECC Memory Modules Location of Mounting Holes Motherboard InstallationTools Needed Installing the Motherboard Back Panel I/O Port Locations and Definitions Control Panel Connectors and I/O PortsBack Panel Connectors and I/O Ports Video Connection Universal Serial Bus USBLAN Ports Pin Definition Ethernet PortsUID LED LE4 Unit Identifier SwitchFront Control Panel JF1 Header PinsNMI Button Power LEDFront Control Panel Pin Definitions NIC1/NIC2 LED Indicators HDD LED/UID SwitchOverheat OH/Fan Fail/PWR Fail/UID Power Fail LEDPower Button Reset ButtonPower Connectors Connecting CablesChassis Intrusion Fan HeadersOverheat LED/Fan Fail TPM Header/PortSGPIO1/2/-S Headers Power SMB I2C ConnectorsExplanation of Jumpers Jumper SettingsGlan Enable/Disable Cmos Clear Watch Dog Enable/DisableBMC Enable VGA EnableManufacture Mode Select Management Engine ME RecoveryIpmi Dedicated LAN LEDs Onboard LED IndicatorsGlan LEDs BMC Heartbeat LED Onboard Power LEDRear UID LED Serial ATA Ports Serial ATA ConnectionsNo Power Troubleshooting ProceduresBefore Power On No Video System Boot FailureLosing the System’s Setup Configuration When the System Becomes Unstable Memory ErrorsSystem becomes unstable before or during OS installation Technical Support Procedures Proper Battery Disposal Battery Installation Battery Removal and InstallationBattery Removal Frequently Asked Questions Returning Merchandise for Service Introduction Starting Bios Setup UtilityStarting the Setup Utility Main SetupHow To Change the Configuration Data Supermicro X9DRG-HF Version System Date/System TimeBuild Date Memory Information Total MemoryBoot Features Advanced Setup ConfigurationsSocket 1 CPU Information/Socket 2 CPU Information Power ConfigurationCPU Configuration 64-bit CPU SpeedClock Spread Spectrum Rtid Record Types IDsMLC Spatial Prefetch Available when supported by the CPU MLC Streamer Prefetcher Available when supported by the CPUDCU Streamer Prefetcher Available when supported by the CPU Active Processor CoresPower Technology  CPU Power Management ConfigurationEist Available when Power Technology is set to Custom Turbo Mode Available when Power Technology is set to CustomLong Duration Power Limit Factory Long Duration Power LimitRecommended Short Duration Power Energy/Performance BiasIntegrated IO Configuration Chipset Configuration North BridgeQPI Configuration Memory Mode Current Memory ModeDram Rapl Mode Current Memory SpeedRank Interleaving Channel InterleavingPatrol Scrub Demand ScrubSATA Configuration South Bridge ConfigurationIDE Mode Sata ModeAhci Mode Aggressive Link Power ManagementPCIe/PCI/PnP Configuration SCU Storage Control Unit ConfigurationAspm Support Maximum Read RequestOnboard LAN Option ROM Select Load Onboard LAN1 Option ROM/Load Onboard LAN2 Option ROMSOL Configuration Super IO ConfigurationSerial Port 1 Configuration Serial Port Console Redirection Console Redirection SettingsResolution Recorder ModeLegacy OS Redirection Resolution Stop BitsData Bits, Parity, Stop Bits ACPI SettingsOut-of-Band Management Port TPM Enable Status ME Subsystem Intel TXT LT-SX ConfigurationISCSI Initiator Name NIC ConfigurationLink Speed Wake on LANEvent Logs Change Smbios Event Log SettingsEnabling/Disabling Options Smbios Event Log Memory Correctable Error Threshold Runtime Error Logging SupportPCI Error Logging Support Erasing Settings Erase Event LogSystem Event Log IpmiBMC Network Configuration Subnet Mask BootStation MAC Address Gateway IP AddressDelete Boot Option Delete Boot OptionAdministrator Password User PasswordSave & Exit Save Changes and ResetDiscard Changes and Exit Save Options Save ChangesSave as User Defaults Restore Optimized DefaultsRestore User Defaults Boot OverrideX9 Ipmi Error Codes Bios Error Beep CodesBios Error Beep Codes X9DRG-HF/X9DRG-HTF Motherboard User’s Manual Driver/Tool Installation Display Screen Installing Software ProgramsConfiguring SuperDoctor SuperDoctor III Interface Display Screen-II Remote Control X9DRG-HF/X9DRG-HTF Motherboard User’s Manual