NXP Semiconductors PCF85x3, PCA8565, PCA2125 user manual 10.1 PCF2123 Offset register

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NXP Semiconductors

UM10301

 

User Manual PCF85x3, PCA8565 and PCF2123, PCA2125

In the datasheets of PCF8583 and PCF8593 the following method is described: Using the alarm function (via the I2C-bus) a signal faster than 1 Hz can be generated at the interrupt output for fast setting of a trimmer. Procedure:

ƒPower-on;

ƒInitialization (alarm functions).

Routine:

ƒSet clock to time T and set alarm to time T + ∆T

ƒAt time (T + ∆T) (Interrupt) repeat the routine.

However, this only works well when ∆T is an integer number of seconds. The 1/10 s and the 1/100 s are derived from a combination of 1 Hz, 2 Hz, 4 Hz, 8 Hz, 16 Hz, 32 Hz etc. signals. The accuracy is therefore only < ± 5 ms. Generating an alarm after T + ∆T with ∆T = 20 ms will show a jitter of plus or minus 5 ms which makes automatic tuning very complicated.

10.1 PCF2123 Offset register

The PCF2123 incorporates an offset register which can be used to implement several functions, e.g.:

Ageing adjustment

Temperature compensation

Accuracy tuning

The offset is made once every two hours in the normal mode, or once every hour in the course mode. Each LSB will introduce an offset of 2.17 ppm for normal mode and 4.34 ppm for course mode. These values are based on a nominal 32.768 kHz clock. The offset value is coded in two’s complement giving a range of +63 LSB’s to -64 LSB’s. The correction is made by adding or subtracting 64 Hz clock correction pulses, thereby changing the period of a single second.

In normal mode, the correction is triggered once every two hours and then correction pulses are applied once per minuted until the programmed correction value has been implemented.

In course mode, the correction is triggered once per hour and then correction pulses are applied once per minute up to a maximum of 60. When absolute correction values of greater than 60 are used, additional correction pulses are made in the 59th minute.

It is possible to monitor when correction pulses are applied. The correction interrupt enable (CIE) mode will generate a 1/128 second pulse on INT for every correction applied. In the case where multiple correction pulses are applied, a 1/128 second interrupt pulse will be generated for each correction pulse applied. Correction is applied to the 1 Hz clock. Any timer or clock output using a frequency of 1 Hz or below will also be affected by the correction pulses. For more details, refer to the PCF2123 datasheet.

UM10301_1

 

© NXP B.V. 2008. All rights reserved.

User manual

Rev. 01 — 23 December 2008

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Contents Info Content Keywords Document informationAbstract Contact information NXP SemiconductorsRevision history Rev Date DescriptionIntroduction Features Register overview PCF8563 Address Register name BitEvent counter mode ComparisonFeatures Comparison of six real time clocksPower-on reset POR Power-on resetVoltage-low detector Oscillator Voltage-low detectionOscillator-stop detection Pierce Oscillator equivalent diagram Overview of internal and external oscillator capacitorsOscillator frequency determining components UM10301 + C Typical values for crystal and surrounding capacitors Parameter Value Unit SourceUsing an external oscillator Oscillation allowanceCrystal and crystal selection Effect of temperature Modes which don’t work− f nom Capacitors and capacitor selection Accuracy Influences on time accuracy Oscillator tuning Oscillator tuning 10.1 PCF2123 Offset register Century and leap year, Daylight Saving Time Century trackingYear and leap year tracking Daylight Saving Time DSTInitialization and setting of alarm and timer Initialization of the RTC and setting the timeBlock Diagram PCF8563 Alarm Setting the alarmBinary BCD Register Comments AddressAlarm function Setting the timer Setting the timerRegister Backup power supply Lithium Primary cellsBackup circuit using primary lithium cell Backup circuit using secondary cell NiCd or NiMH NiCd and NiMH secondary batteries13.3 Capacitors Charging the backup capacitor Diode selection Some suggestions for diode D11N4148 BAS716 BAS116 BAV170PCB layout guidelines PCB layout proposal for PCF8563 using leaded components Partial circuit switch down Hints to keep power consumption low Protection diodes0007 8473 ⋅ C b Rpmax as a function of bus capacitanceApplication diagram 1, I2C-bus interface Application diagram 2, SPI interfaceFirst period inaccuracy when using the timer Timer delaysTimer Source clock frequency Delay for n = General countdown timer behaviourFirst period delay for timer counter value n Timer source clock Minimum timer period Maximum timer periodTiming requirements for I2C read and write Block diagram I2C interface and Time counters I2C interfaceSequence of events example Read Troubleshooting Oscillator startup time Checking for oscillationNo communication via I2C-bus References Wrong time and date, wrong clock speedLegal information DefinitionsDisclaimers TrademarksContents