NXP Semiconductors PCF2123, PCF85x3, PCA8565, PCA2125 user manual No communication via I2C-bus

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NXP Semiconductors

UM10301

 

User Manual PCF85x3, PCA8565 and PCF2123, PCA2125

19.3 No communication via I2C-bus

When no communication with the RTC is possible, it is also not possible to set and read time. Normally the I2C-bus will not get stuck, but especially during the development phase problems may occur that hang up the bus. One reason may be that spikes on the bus lines are interpreted as additional pulses which then would convey data not in line with the I2C-protocol. Also timing violations when for example two GPIOs are used to emulate an I2C-bus sometimes lead to unexpected results. On I2C-devices a scope may be used to verify whether the RTC sends an acknowledgement at the end of each byte. Over the past years oscilloscopes have been introduced that allow trigger and decode for serial bus protocols, including I2C and SPI. Also timing violations can be easily found with such equipment. These include rise and fall times, setup time, hold times and also voltage levels.

If the bus gets stuck first it needs to be determined how exactly it is stuck. There are two “bus stuck scenarios”:

•SCL (clock) stuck low: There is nothing that can be done about this but to hard reset the device (remove power) because the I2C-bus requires clock edges to clock the data;

•SDA (data) stuck low, but clock ok: A start condition can’t be sent because this requires a high to low transition of SDA while SCL is high. SDA however is stuck low.

What will work is to send 9 clocks plus a STOP condition. The 9 clock pulses will clear the I2C state machine, thus causing the device to release the bus. This permits the master to send a STOP condition and now the I2C interface of the slave will have been reset. This works for all I2C compatible devices without exception.

According to the I2C specification there exists a so-called general call address. This is for addressing every device connected to the I2C-bus at the same time. The general call address is 00HEX. However, if a device does not need any of the data supplied within the general call structure, it can ignore this address by not issuing an acknowledgement. An I2C device does not have to be designed such that it responds to a general call address. The real time clocks for which this manual is valid do not respond to the general call address.

Sending the 9 clock pulses with SDA low may seem like sending a general call address since data is always zero for every clock pulse. The difference however is that no START condition could be sent first since SDA was already stuck low. Sending the 9 clock pulses is not the same as sending a general call address. If a device does require data from a general call address, it will acknowledge this address and behave as a slave receiver. The master does not actually know how many devices acknowledged if one or more devices respond. The second and following bytes will be acknowledged by every slave-receiver capable of handling this data. A slave which cannot process one of these bytes must ignore it by not-acknowledging. These RTCs will not respond to a general call.

In short, when the bus is stuck low due to SDA, the sequence to recover the bus is by sending 9 clock pulses plus STOP.

Remark: Only the PCF8593 includes a dedicated RESET input. When reset occurs only the I2C-bus interface is reset. Thus for this device a second option of releasing the I2C- bus is available.

UM10301_1

 

© NXP B.V. 2008. All rights reserved.

User manual

Rev. 01 — 23 December 2008

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Contents Document information Info Content KeywordsAbstract NXP Semiconductors Contact informationRevision history Rev Date DescriptionIntroduction Features Address Register name Bit Register overview PCF8563Comparison Event counter modeComparison of six real time clocks FeaturesPower-on reset Power-on reset PORVoltage-low detector Voltage-low detection OscillatorOscillator-stop detection Overview of internal and external oscillator capacitors Pierce Oscillator equivalent diagramOscillator frequency determining components UM10301 + C Parameter Value Unit Source Typical values for crystal and surrounding capacitorsOscillation allowance Using an external oscillatorCrystal and crystal selection Modes which don’t work Effect of temperature− f nom Capacitors and capacitor selection Accuracy Influences on time accuracy Oscillator tuning Oscillator tuning 10.1 PCF2123 Offset register Century tracking Century and leap year, Daylight Saving TimeYear and leap year tracking Daylight Saving Time DSTInitialization of the RTC and setting the time Initialization and setting of alarm and timerBlock Diagram PCF8563 Setting the alarm AlarmBinary BCD Register Comments AddressAlarm function Setting the timer Setting the timerRegister Lithium Primary cells Backup power supplyBackup circuit using primary lithium cell NiCd and NiMH secondary batteries Backup circuit using secondary cell NiCd or NiMH13.3 Capacitors Charging the backup capacitor Some suggestions for diode D1 Diode selection1N4148 BAS716 BAS116 BAV170PCB layout guidelines PCB layout proposal for PCF8563 using leaded components Partial circuit switch down Protection diodes Hints to keep power consumption low0007 Rpmax as a function of bus capacitance 8473 ⋅ C bApplication diagram 2, SPI interface Application diagram 1, I2C-bus interfaceTimer delays First period inaccuracy when using the timerTimer Source clock frequency Delay for n = General countdown timer behaviourTimer source clock Minimum timer period Maximum timer period First period delay for timer counter value nTiming requirements for I2C read and write I2C interface Block diagram I2C interface and Time countersSequence of events example Read Oscillator startup time Checking for oscillation TroubleshootingNo communication via I2C-bus Wrong time and date, wrong clock speed ReferencesDefinitions Legal informationDisclaimers TrademarksContents
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