NXP Semiconductors PCA8565, PCF85x3, PCF2123, PCA2125 user manual Partial circuit switch down

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NXP Semiconductors

UM10301

 

User Manual PCF85x3, PCA8565 and PCF2123, PCA2125

layer 1

guard ring

 

 

 

oscillator

bypass

 

 

 

 

capacitor

capacitor

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SMD

CRYSTAL

OSCI

 

VDD

OSCO

PCF8563TS

CLK

 

 

INT

 

SCL

VSS

 

SDA

ground via

GND area

001aai849

Fig 15. PCB layout proposal for PCF8563 using SMD components and guard ring

Remark: Take precautions when cleaning PCBs containing tuning fork crystals using ultrasound. The resonance vibration may damage the crystal. Consult the supplier of the crystal in case of doubt.

15. Partial circuit switch down

The I2C-bus RTC circuits PCF8563, PCA8565 and PCF8593 have on the pads SDA, SCL and INT a diode clamping circuit without an upper clamping diode to VDD, refer to Fig 16.

Therefore it is possible to partially switch off VDD such that the RTC is powered down or working at a lower supply voltage than the rest of the circuit without the risk that via such (upper) clamping diodes SDA, SCL and INT would be pulled down as well.

The other way around with only the RTC powered in order to keep time and the rest of the circuit switched off will be a more common situation. If during normal operation the complete application is powered by a certain VDD of for example 3.3 V or 5 V, then during standby just the RTC can be operating and powered from a backup source as discussed in Chapter 13. See Fig 16 and Fig 18 plus Fig 19.

PCF8583 has no protection diode from INT to VDD but has protection diodes from the I2C- bus pins to VDD ! Battery backup will work, but with the RTC powered down the I2C-bus may get stuck.

The SPI-bus RTC circuits PCF2123 and PCA2125 have on pins SDI and SCL only one clamping diode from VSS to the pin. On pin SDO an additional clamping diode to VDD is integrated. This allows for partial circuit switch down where the RTC still runs and the rest of the application is powered down.

UM10301_1

 

© NXP B.V. 2008. All rights reserved.

User manual

Rev. 01 — 23 December 2008

38 of 52

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Contents Abstract Info Content KeywordsDocument information Revision history Contact informationNXP Semiconductors Rev Date DescriptionIntroduction Features Register overview PCF8563 Address Register name BitEvent counter mode ComparisonFeatures Comparison of six real time clocksVoltage-low detector Power-on reset PORPower-on reset Oscillator-stop detection OscillatorVoltage-low detection Pierce Oscillator equivalent diagram Overview of internal and external oscillator capacitorsOscillator frequency determining components UM10301 + C Typical values for crystal and surrounding capacitors Parameter Value Unit SourceUsing an external oscillator Oscillation allowanceCrystal and crystal selection Effect of temperature Modes which don’t work− f nom Capacitors and capacitor selection Accuracy Influences on time accuracy Oscillator tuning Oscillator tuning 10.1 PCF2123 Offset register Year and leap year tracking Century and leap year, Daylight Saving TimeCentury tracking Daylight Saving Time DSTBlock Diagram PCF8563 Initialization and setting of alarm and timerInitialization of the RTC and setting the time Binary BCD AlarmSetting the alarm Register Comments AddressAlarm function Register Setting the timerSetting the timer Backup power supply Lithium Primary cellsBackup circuit using primary lithium cell Backup circuit using secondary cell NiCd or NiMH NiCd and NiMH secondary batteries13.3 Capacitors Charging the backup capacitor 1N4148 Diode selectionSome suggestions for diode D1 BAS716 BAS116 BAV170PCB layout guidelines PCB layout proposal for PCF8563 using leaded components Partial circuit switch down Hints to keep power consumption low Protection diodes0007 8473 ⋅ C b Rpmax as a function of bus capacitanceApplication diagram 1, I2C-bus interface Application diagram 2, SPI interfaceTimer Source clock frequency Delay for n = First period inaccuracy when using the timerTimer delays General countdown timer behaviourFirst period delay for timer counter value n Timer source clock Minimum timer period Maximum timer periodTiming requirements for I2C read and write Block diagram I2C interface and Time counters I2C interfaceSequence of events example Read Troubleshooting Oscillator startup time Checking for oscillationNo communication via I2C-bus References Wrong time and date, wrong clock speedDisclaimers Legal informationDefinitions TrademarksContents
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