Digi BL1800 user manual V ⋅ 1 e RC, 1 DA1

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It is very easy to do pulse-width modulation with the Rabbit 2000 microprocessor because of the chip’s architecture.

3.4.1 DA1

The op amp supporting DA1 converts pulse-width modulated signals to an analog voltage between 0 V and 5 V. A digital signal that varies with time is fed from PD4. The resolution of the DA1 output depends on the smallest increment of time to change the on/off time (the time between 5 V and 0 V). The Jackrabbit uses the Rabbit 2000’s Port D control reg- isters to clock out the signal at a timer timeout. The timer used is timer B. Timer B has 10 bits of resolution so that the voltage can be varied in 1/1024 increments. The resolution is thus about 5 mV (5 V/1024).

R28 is present solely to balance the op amp input current bias. R25 helps to achieve a volt- age close to ground for a 0% duty cycle.

A design constraint dictates how fast timer B must run. The hardware filter has a resistor- capacitor filter that averages the 0 V and 5 V values. Its effect is to smooth out the digital pulse train. It cannot be perfect, and so there will be some ripple in the output voltage. The maximum signal decay between pulses will occur when DA1 is set to 2.5 V. This means the pulse train will have a 50% duty cycle. The maximum signal decay will be

⎛ –t⎞ ⎝ -------⎠

2.5 V ⋅ 1 – e RC

where RC = 0.01 s for 14.74 MHz Jackrabbits, and t is the pulse on or off time (not the length of the total cycle).

Timer B is driven at the Rabbit 2000 frequency divided by 2. The frequency achievable with a 14.74 MHz clock is (14.74 MHz/2)/1024 = 7.17 kHz. This is a period of 1/f = 139 µs. For a 50% duty cycle, half of the period will be high (70 µs at 5 V), and half will be low (70 µs at 0 V). Thus, a 14.74 MHz Jackrabbit has t = 70 µs. Based on the standard capaci- tor discharge formula, this means that the maximum voltage change will be

 

 

⎛ ----------------–70 µs⎞

 

 

2.5 V ⋅

 

⎝ 0.01 s ⎠

 

1 – e

 

 

 

= 17.4 mV

This is less than a 20 mV peak-to-peak ripple.

The DA1 output can be less than 100 mV for a 0% duty cycle and above 3.5 V for a 100% duty cycle. Because of software limitations on the low side and hardware limitations on the high side, the duty cycle can only be programmed from 12% to 72%. The low limita- tion allows the software to perform other tasks as well as maintain the PWM for the D/A converters. The high limitation is simply the maximum voltage obtainable with the LM324 op amp used in the circuit. Anything outside the 12%–72% range gets output as

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Jackrabbit (BL1800)

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Contents Jackrabbit BL1800 Programmable Single-Board ComputerTrademarks Digi International IncTable of Contents Index Schematics Features IntroductionJackrabbit Features Development and Evaluation ToolsAdditional Product Information How to Use This ManualOnline Documentation Immunity CE ComplianceEmissions Design Guidelines General SafetyInterfacing the Jackrabbit to Other Devices Jackrabbit BL1800 Development Kit Contents Getting StartedDevelopment Hardware Connections Board Attach Jackrabbit to Prototyping BoardConnect Programming Cable Assemble AC AdapterConnect Power Installing Dynamic C Troubleshooting Run a Sample ProgramReal-Time Clock Where Do I Go From Here?Technical Support Subsystems BL1800Jackrabbit Pinouts HeadersDigital Inputs/Outputs Digital InputsDigital Outputs HV3 Sourcing OutputConfigurable High-Current Output Bidirectional I/O Changing HV3 to a Sinking OutputSchematic Diagram of A/D Converter A/D ConverterJackrabbit BL1800 Schematic Diagram of D/A Converters D/A ConvertersV ⋅ 1 e RC 1 DA1Typical DA1 Voltages for Various Duty Cycles 2 DA0 Typical DA0 Voltages for Various Duty CyclesUser’s Manual 1 RS-232 Serial Communication2 RS-485 Ground recommended Programming Port 485 R16User’s Manual Changing Between Program Mode and Run Mode Programming CableSram MemoryFlash Eprom External Interrupts Other HardwareClock Doubler Spectrum Spreader Jackrabbit BL1800 Software Reference An Overview of Dynamic CJackrabbit BL1800 Sample Programs Jackrabbit Sample ProgramsDEMOJR1.C Sample Program DEMOJR1.CSingle-Stepping Watch Expression Break PointEditing the Program Summary of FeaturesWatching Variables Dynamically User’s Manual Other Sample Programs Illustrating Digital I/O R/W pin and DB0-DB3 on 3 RS-232 Serial Communication Sample Programs 4 RS-485 Serial Communication Sample Program Cooperative Multitasking Int vswitch Advantages of Cooperative Multitasking Jackrabbit Function Calls 1 I/O DriversVoid digOutint channel, int value Void anaOutint channel, int value Void anaInint channel, int *value Serial Communication Drivers Patches and Bug Fixes Upgrading Dynamic CAdd-On Modules Appendix A. Specifications Electrical and Mechanical Specifications Figure A-1shows the mechanical dimensions for the JackrabbitTable A-1. Jackrabbit Board Specifications Exclusion Zone Exclusion ZonesFigure A-3. User Board Footprint for Jackrabbit Jumper Configurations Figure A-4. Location of Jackrabbit Configurable PositionsTable A-2. Jackrabbit Jumper Configurations Conformal Coating Conformally coated areaUse of Rabbit 2000 Parallel Ports JackrabbitTable A-3. Jackrabbit Pinout Configurations PD0 PD1 Jackrabbit BL1800 Appendix B. Prototyping Board Jackrabbit Connectors User LEDs Buzzer Prototyping Board OverviewPrototyping Board Features Mechanical Dimensions and Layout Top SideUsing the Prototyping Board Top SideDemonstration Board RelayExisting Prototyping Board Top SidePE0 VCC HV0 SM1 SM0 HV2 Stat Jackrabbit BL1800 Appendix C. Power Management Power SuppliesDcin Current mA Batteries and External Battery Connections 950 mA·h = 5.4 years 20 µABattery Backup Circuit Figure C-5shows the Jackrabbit battery backup circuitryPower to Vram Switch Reset GeneratorFigure C-7shows a schematic of the chip select circuit Chip Select CircuitJackrabbit BL1800 Index SMODE0 SMODE1RABDB01.C RABDB02.C Schematics
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