Digi BL1800 user manual Memory, Sram, Flash Eprom

Page 37

3.7 Memory

3.7.1 SRAM

The Jackrabbit is designed to accept 32K to 512K of SRAM packaged in an SOIC case.

Standard Jackrabbit models come with 128K of SRAM. A factory-installed option for 512K of SRAM is available. Figure 14 shows the locations and the jumper settings for the jump- ers at JP1 used to set the SRAM size. The “jumpers” are 0 Ω surface-mounted resistors.

U1

GND

J1

J2

VIN GND

 

J3

 

 

 

 

SRAM

 

 

 

 

 

128K

512K

 

 

 

JP1

 

 

JP1

 

 

 

 

 

3

2

1

3

2

1

 

 

 

 

 

 

U4

 

 

 

 

J4

 

 

 

RS-232

 

 

J5

GND

VCC

 

 

JP1

 

 

VCC

GND

PA0

PA1

 

 

 

 

RXB

RXC

 

 

 

 

 

PA2

PA3

 

 

U5

 

 

TXB

TXC

PA4

PA5

 

 

 

 

 

PC0

PC1

PA6

PA7

U3

 

 

 

 

PC2

PC3

GND

GND

 

 

 

 

PC4

PC5

 

 

 

SRAM

 

PB0

PB1

 

 

 

 

PC6

PC7

 

 

 

 

 

PB2

PB3

 

 

 

 

 

AD0

AGND

PB4

PB5

 

 

 

 

 

DA0

DA1

PB6

PB7

 

 

 

 

 

PD0

PD1

WDO

PCLK

 

 

 

 

 

PD2

PD3

GND

PE7

 

 

 

 

 

PD4

PD5

PE6

PE5

 

 

 

 

 

PD6

PD7

PE4

PE3

 

 

 

 

 

GND

GND

PE2

PE1

 

 

 

 

 

485–

485+

PE0

GND

 

 

 

U6

 

VCC

VCC

HV0

HV1

 

 

 

 

SM0

SM1

HV2

HV3

 

 

 

 

IOBEN

STAT

K

+RAW

 

 

 

RS-485

 

GND

VBAT

GND

VCC

Y3

 

 

 

/RST

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RESET

JACKRABBIT Z-World, Inc.

Figure 14. Jackrabbit Jumper Settings for SRAM Size

NOTE: For ordering or other information involving the factory-installed 512K SRAM option, call your Rabbit sales representative or distributor.

No 0 Ω surface-mounted resistors are installed at JP1 for 32K SRAM.

3.7.2 Flash EPROM

The Jackrabbit is also designed to accept 128K to 512K of flash EPROM packaged in a TSOP case.

NOTE: Rabbit recommends that any customer applications should not be constrained by the sector size of the flash memory since it may be necessary to change the sector size in the future.

A Flash Memory Bank Select jumper configuration option exists at JP3 with 0 Ω surface- mounted resistors for Jackrabbit boards labeled 175-0255. This option, used in conjunc- tion with some configuration macros, allows Dynamic C to compile two different co-resi- dent programs for the upper and lower halves of the 256K flash in such a way that both programs start at logical address 0000. This is useful for applications that require a resi- dent download manager and a separate downloaded program. See Technical Note 218, Implementing a Serial Download Manager for a 256K Flash, for details.

User’s Manual

33

Image 37
Contents Programmable Single-Board Computer Jackrabbit BL1800Digi International Inc TrademarksTable of Contents Index Schematics Introduction FeaturesDevelopment and Evaluation Tools Jackrabbit FeaturesAdditional Product Information How to Use This ManualOnline Documentation Immunity CE ComplianceEmissions Design Guidelines General SafetyInterfacing the Jackrabbit to Other Devices Jackrabbit BL1800 Getting Started Development Kit ContentsDevelopment Hardware Connections Attach Jackrabbit to Prototyping Board BoardAssemble AC Adapter Connect Programming CableConnect Power Installing Dynamic C Run a Sample Program TroubleshootingReal-Time Clock Where Do I Go From Here?Technical Support BL1800 SubsystemsHeaders Jackrabbit PinoutsDigital Inputs Digital Inputs/OutputsHV3 Sourcing Output Digital OutputsConfigurable High-Current Output Changing HV3 to a Sinking Output Bidirectional I/OA/D Converter Schematic Diagram of A/D ConverterJackrabbit BL1800 D/A Converters Schematic Diagram of D/A Converters1 DA1 V ⋅ 1 e RCTypical DA1 Voltages for Various Duty Cycles Typical DA0 Voltages for Various Duty Cycles 2 DA0User’s Manual 1 RS-232 Serial Communication2 RS-485 Ground recommended 485 R16 Programming PortUser’s Manual Programming Cable Changing Between Program Mode and Run ModeSram MemoryFlash Eprom External Interrupts Other HardwareClock Doubler Spectrum Spreader Jackrabbit BL1800 An Overview of Dynamic C Software ReferenceJackrabbit BL1800 Jackrabbit Sample Programs Sample ProgramsSample Program DEMOJR1.C DEMOJR1.CWatch Expression Break Point Single-SteppingEditing the Program Summary of FeaturesWatching Variables Dynamically User’s Manual Other Sample Programs Illustrating Digital I/O R/W pin and DB0-DB3 on 3 RS-232 Serial Communication Sample Programs 4 RS-485 Serial Communication Sample Program Cooperative Multitasking Int vswitch Advantages of Cooperative Multitasking 1 I/O Drivers Jackrabbit Function CallsVoid digOutint channel, int value Void anaOutint channel, int value Void anaInint channel, int *value Serial Communication Drivers Patches and Bug Fixes Upgrading Dynamic CAdd-On Modules Appendix A. Specifications Figure A-1shows the mechanical dimensions for the Jackrabbit Electrical and Mechanical SpecificationsTable A-1. Jackrabbit Board Specifications Exclusion Zones Exclusion ZoneFigure A-3. User Board Footprint for Jackrabbit Figure A-4. Location of Jackrabbit Configurable Positions Jumper ConfigurationsTable A-2. Jackrabbit Jumper Configurations Conformally coated area Conformal CoatingJackrabbit Use of Rabbit 2000 Parallel PortsTable A-3. Jackrabbit Pinout Configurations PD0 PD1 Jackrabbit BL1800 Appendix B. Prototyping Board Prototyping Board Overview Jackrabbit Connectors User LEDs BuzzerPrototyping Board Features Top Side Mechanical Dimensions and LayoutTop Side Using the Prototyping BoardRelay Demonstration BoardExisting Top Side Prototyping BoardPE0 VCC HV0 SM1 SM0 HV2 Stat Jackrabbit BL1800 Power Supplies Appendix C. Power ManagementDcin Current mA 950 mA·h = 5.4 years 20 µA Batteries and External Battery ConnectionsFigure C-5shows the Jackrabbit battery backup circuitry Battery Backup CircuitReset Generator Power to Vram SwitchChip Select Circuit Figure C-7shows a schematic of the chip select circuitJackrabbit BL1800 SMODE0 SMODE1 IndexRABDB01.C RABDB02.C Schematics