Cypress AN6077, FX2LP manual EP0BCH EP0BCL, = True

Page 20

AN6077

EP0BUF[ 0 ] = Configuration;

EP0BCH

= 0;

 

EP0BCL

= 1;

// Handled by user code

return(TRUE);

}

BOOL DR_SetInterface( void )

{// Called when a Set Interface command is received AlternateSetting = SETUPDAT[ 2 ];

return( TRUE );

// Handled by user code

}

BOOL DR_GetInterface( void )

{// Called when a Set Interface command is received EP0BUF[ 0 ] = AlternateSetting;

EP0BCH = 0;

EP0BCL = 1;

// Handled by user code

return( TRUE );

}

BOOL DR_GetStatus( void )

{

return( TRUE );

}

BOOL DR_ClearFeature( void )

{

return( TRUE );

}

BOOL DR_SetFeature( void )

{

return( TRUE );

}

BOOL DR_VendorCmnd( void )

{

return( TRUE );

}

//-----------------------------------------------------------------------------

//USB Interrupt Handlers

//The following functions are called by the USB interrupt jump table.

//-----------------------------------------------------------------------------

//Setup Data Available Interrupt Handler void ISR_Sudav( void ) interrupt 0

{

GotSUD

= TRUE;

//

Set flag

EZUSB_IRQ_CLEAR( );

//

Clear SUDAV IRQ

USBIRQ

= bmSUDAV;

}

//Setup Token Interrupt Handler void ISR_Sutok( void ) interrupt 0

{

EZUSB_IRQ_CLEAR( );

// Clear SUTOK IRQ

USBIRQ = bmSUTOK;

}

void ISR_Sof( void ) interrupt 0

{

EZUSB_IRQ_CLEAR( );

February 19, 2008

Document No. 001-15342 Rev. **

20

Image 20
Contents Application Note Abstract IntroductionCreating Gpif Waveforms Gpif Master Pin DescriptionsSlave Fifo Pin Descriptions Fifowr Firmware Programming Master Firmware ArchitectureExpanded Master OUT Code Psuedocode for Master OUTPsuedocode for Master Syncdelay Gpiftrig = Gpiftrigwr GPIFEP2 Expanded Master in CodeSyncdelay Firmware for the SlaveSummary Gpiftrig = Gpiftrigrd GPIFEP6Code Listing for Master Side EP4 and EP8 are not used in this implementation Gpiftrig Trigger Fifo write transactions, using SFR Syncdelay Gpiftrig = Gpiftrigrd GPIFEP6 Setupdat Usbirq = TrueEzusbirqclear Clear Ures IRQ + Feedback Code Listing for the Slave Side AUTOOUT=0, WORDWIDE=0 Syncdelay AUTOOUT=1, WORDWIDE=0 AUTOIN=1, ZEROLENIN=1, WORDWIDE=0EP0BCH EP0BCL Clear Ures IRQ + Feedback + Feedback