Cypress AN6077, FX2LP manual Gpiftrig

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AN6077

}

#define GPIFTRIGWR 0 #define GPIFTRIGRD 4

#define GPIF_EP2 0 #define GPIF_EP4 1 #define GPIF_EP6 2 #define GPIF_EP8 3

void TD_Poll( void )

{// Called repeatedly while the device is idle static WORD xFIFOTC_OUT = 0x0000;

static WORD xFIFOTC_IN = 0x0000;

// Registers which require a synchronization delay, see section 15.14

// FIFORESET

FIFOPINPOLAR

// INPKTEND

OUTPKTEND

// EPxBCH:L

REVCTL

// GPIFTCB3

GPIFTCB2

// GPIFTCB1

GPIFTCB0

// EPxFIFOPFH:L

EPxAUTOINLENH:L

// EPxFIFOCFG

EPxGPIFFLGSEL

// PINFLAGSxx

EPxFIFOIRQ

// EPxFIFOIE

GPIFIRQ

// GPIFIE

GPIFADRH:L

// UDMACRCH:L

EPxGPIFTRIG

// GPIFTRIG

 

OEA = 0xC0;

IOA = 0x80;

if( td_poll_handles_transfers )

{

//Handle OUT data

//is the peripheral interface idle

if( GPIFTRIG & 0x80 )

{

//DONE=1, when GPIF is "idle"

//check if there is a packet in the peripheral domain (EP2OUT) if( EP24FIFOFLGS & 0x02 )

{

//EF=1 when buffer "empty", for example, no more data to transfer

}

else

{

//EF=0, when slave fifo is "not empty"

//the cpu passed the packet to the peripheral domain (AUTO OUT)

//check if peripheral "not full"

if( GPIFREADYSTAT & 0x02 )

{

//RDY1=1, when peripheral is "not" FULL (tied to peripheral "full" flag)

//drive FIFOADDR lines

OEA = 0xC0;

IOA = 0x80;

xFIFOTC_OUT = ( ( EP2FIFOBCH << 8 ) + EP2FIFOBCL );

February 19, 2008

Document No. 001-15342 Rev. **

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Contents Application Note Abstract IntroductionSlave Fifo Pin Descriptions Gpif Master Pin DescriptionsCreating Gpif Waveforms Fifowr Firmware Programming Master Firmware ArchitecturePsuedocode for Master Psuedocode for Master OUTExpanded Master OUT Code Syncdelay Gpiftrig = Gpiftrigwr GPIFEP2 Expanded Master in CodeSummary SyncdelayFirmware for the Slave Gpiftrig = Gpiftrigrd GPIFEP6Code Listing for Master Side EP4 and EP8 are not used in this implementation Gpiftrig Trigger Fifo write transactions, using SFR Syncdelay Gpiftrig = Gpiftrigrd GPIFEP6 Setupdat Ezusbirqclear = TrueUsbirq Clear Ures IRQ + Feedback Code Listing for the Slave Side AUTOOUT=0, WORDWIDE=0 Syncdelay AUTOOUT=1, WORDWIDE=0 AUTOIN=1, ZEROLENIN=1, WORDWIDE=0EP0BCH EP0BCL Clear Ures IRQ + Feedback + Feedback