Cypress CY7C63613C, CY7C63513C, CY7C63413C manual Truth Tables, USB Register Mode Encoding, Nak, Ack

Page 21

 

 

 

 

 

 

 

 

CY7C63413C

 

 

 

 

 

 

 

 

 

CY7C63513C

 

 

 

 

 

 

 

 

 

CY7C63613C

 

Truth Tables

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Table 28.USB Register Mode Encoding

 

 

 

 

 

 

 

 

 

 

 

Mode

Encoding

Setup

In

Out

Comments

 

Disable

0000

 

ignore

ignore

ignore

Ignore all USB traffic to this endpoint

 

 

 

 

 

 

 

 

 

 

Nak In/Out

 

 

 

accept

NAK

NAK

Forced from Set-up on Control endpoint, from modes other

 

 

 

0001

 

 

 

 

than 0000

 

Status Out Only

0010

 

accept

stall

check

For Control endpoints

 

 

 

 

 

 

 

 

 

Stall In/Out

0011

 

accept

stall

stall

For Control endpoints

 

Ignore In/Out

0100

 

accept

ignore

ignore

For Control endpoints

 

 

 

 

 

 

 

 

 

 

Isochronous Out

 

 

 

ignore

ignore

always

Available to low speed devices, future USB spec

 

 

 

0101

 

 

 

 

enhancements

 

Status In Only

0110

 

accept

TX 0

stall

For Control Endpoints

 

 

 

 

 

 

 

 

 

 

Isochronous In

 

 

 

ignore

TX cnt

ignore

Available to low speed devices, future USB spec

 

 

 

0111

 

 

 

 

enhancements

 

Nak Out

1000

 

ignore

ignore

NAK

An ACK from mode 1001 --> 1000

 

Ack Out

1001

 

ignore

ignore

ACK

This mode is changed by SIE on issuance of ACK --> 1000

 

 

 

 

 

 

 

 

 

Nak Out - Status In

1010

 

accept

TX 0

NAK

An ACK from mode 1011 --> 1010

 

 

 

 

 

 

 

 

 

Ack Out - Status In

1011

 

accept

TX 0

ACK

This mode is changed by SIE on issuance of ACK --> 1010

 

Nak In

1100

 

ignore

NAK

ignore

An ACK from mode 1101 --> 1100

 

 

 

 

 

 

 

 

 

Ack In

1101

 

ignore

TX cnt

ignore

This mode is changed by SIE on issuance of ACK --> 1100

 

 

 

 

 

 

 

 

 

Nak In - Status Out

1110

 

accept

NAK

check

An ACK from mode 1111 --> 1110 NAck In - Status Out

 

Ack In - Status Out

1111

 

accept

TX cnt

Check

This mode is changed by SIE on issuance of ACK -->1110

 

 

 

 

 

 

 

 

 

 

 

The ‘In’ column represents the SIE’s response to the token type.

A disabled endpoint will remain such until firmware changes it, and all endpoints reset to disabled.

Any Setup packet to an enabled and accepting endpoint will be changed by the SIE to 0001 (NAKing). Any mode which indicates the acceptance of a Setup will acknowledge it.

Most modes that control transactions involving an ending ACK will be changed by the SIE to a corresponding mode which NAKs follow on packets.

A Control endpoint has three extra status bits for PID (Setup, In and Out), but must be placed in the correct mode to function as such. Also a non-Control endpoint can be made to act as a Control endpoint if it is placed in a non appropriate mode.

A ‘check’ on an Out token during a Status transaction checks to see that the Out is of zero length and has a Data Toggle (DTOG) of 1.

Document #: 38-08027 Rev. *B

Page 21 of 32

[+] Feedback

Image 21
Contents Features Functional OverviewCypress Semiconductor Corporation CY7C63413C CY7C63513C CY7C63613C Logic Block Diagram Programming Model Pin DefinitionsAddress Modes Bit Data Stack Pointer DSPMOV A,DSPINIT Buttons EQU 10h MOV A,buttonsOperand Opcode Cycles Instruction Set SummaryProgram Memory Organization Memory OrganizationReserved Program Memory begins hereData Memory Organization O Register Summary Register SummaryRegister Name Address Read/Write Function USB Address A, Endpoint 0 counter registerClocking ResetPin General Purpose I/O PortsAddr Port 1 Data Addr Port 2 DataGpio Interrupt Enable Ports Port 0 Interrupt EnableGpio Configuration Port Addr Port 0 Interrupt EnableAddr Gpio Configuration Register + defaultDAC Port Cmos OutputAddr DAC Port Interrupt Enable DAC Port Interrupt EnableDAC Port Interrupts DAC Isink RegistersUSB Serial Interface Engine SIE USB Device Addr 0x11, 0x13 USB Device Counter Registers USB Device Counter RegistersData 0/1 Byte countTimer LSB Timer Register Bit Free-running TimerAddr Timer Register LSB Timer MSB Timer Register Addr Timer Register MSBUSB End Point Interrupt Enable Register Addr Global Interrupt Enable Register AddrInterrupts Gpio DACInterrupt Vector Assignments Interrupt VectorsInterrupt Vector Number ROM Address Function Interrupt LatencyTruth Tables USB Register Mode EncodingEncoding NAKEncoding What the SIE does to Mode bits PID Status bits Interrupt?Setup Packet if accepting Set End Point ModeControl Write Control ReadOut endpoint Absolute Maximum Ratings Power-On ResetParameter Min Max Unit Conditions General USB InterfaceSwitching Characteristics Differential Data Lines Ordering Code Ordering InformationPackage Package Type Operating Size RangeDIe Pad Locations in microns Pad # Pin Name Die Pad LocationsPackage Diagrams Lead Shrunk Small Outline Package SP48Lead 600-Mil Molded DIP P2 PIN 1 ID Package Diagrams Lead 300-Mil Soic S24.3/SZ24.3Document History Issue Orig. Description of Change DateDSG TYJ

CY7C63613C, CY7C63413C, CY7C63513C specifications

The Cypress CY7C63513C, CY7C63413C, and CY7C63613C are versatile programmable logic devices that are part of the Cypress family of microcontrollers designed for diverse applications. These devices are particularly well-suited for embedded systems, consumer electronics, and industrial control systems due to their robust features and technologies.

One of the standout characteristics of these devices is their programmable architecture, which allows for flexible design implementations. The CY7C63513C features 32 programmable I/O pins and an 8-bit microcontroller core, which provides ample resource allocation for various input/output operations. The device supports various communication interfaces, including SPI and I2C, enabling seamless integration into different system configurations.

The CY7C63413C is a highly adaptable component, offering similar features but with an enhanced flexibility in its I/O configuration, making it ideal for applications that require quick prototyping and development cycles. Its extensive instruction set allows for more complex processing tasks, catering to advanced applications in automation and signal processing.

On the other hand, the CY7C63613C provides an advanced level of integration with built-in support for multiple power management modes. This feature is crucial in modern battery-operated devices where energy conservation is a primary concern. Its low-power operation enhances the usability in portable applications while still maintaining performance.

In terms of performance, all three devices boast high-speed operation, with clock frequencies reaching up to 24 MHz. This ensures that they can efficiently handle tasks that require real-time processing, such as sensor data management and control algorithms. The devices are also equipped with an on-chip EEPROM and RAM, allowing for data storage and quick retrieval.

In addition to their performance characteristics, the CY7C63513C, CY7C63413C, and CY7C63613C are designed with reliability in mind. They incorporate robust error detection and correction features, ensuring data integrity during operation. This reliability is essential for critical applications, such as automotive systems and industrial automation.

Overall, the Cypress CY7 series presents an appealing solution for developers looking for a blend of flexibility, performance, and reliability in their embedded designs. Their programmability and support for multiple communication protocols make them a formidable choice in today’s fast-paced technological landscape, paving the way for innovative applications across various industries.