Cypress CY7C63513C manual Ordering Information, Ordering Code, Package Package Type Operating Size

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CY7C63413C

CY7C63513C

CY7C63613C

TPERIOD

Differential Data Lines

Crossover

Point

Diff. Data to

SE0 Skew

N* TPERIOD + TDEOP

Crossover Point

Extended

Source EOP Width: TEOPT

Receiver EOP Width: TEOPR1, TEOPR2

Figure 11. Differential to EOP Transition Skew and EOP Width

TPERIOD

 

Differential

Crossover

Points

Data Lines

 

Consecutive

Transitions

N* TPERIOD + TxJR1

Paired

Transitions

N* TPERIOD + TxJR2

Figure 12. Differential Data Jitter

Ordering Information

Ordering Code

EPROM

Package

Package Type

Operating

Size

Name

Range

 

 

 

 

 

CY7C63413C-PVXC

8 KB

SP48

48-Lead Shrunk Small Outline Package

Commercial

 

 

 

 

 

CY7C63413C-PVXCT

8 KB

SP48

48-Lead SSOP Lead-Free Tape-reel

Commercial

 

 

 

 

 

CY7C63413C-PXC

8 KB

P2

40-pin (600 mil) PDIP Lead-Free

Commercial

 

 

 

 

 

CY7C63513C-PVXC

8 KB

SP48

48-Lead SSOP Lead-Free

Commercial

 

 

 

 

 

CY7C63613C-SXC

8 KB

SZ24.3

24-lead (300 mil) SOIC Lead-Free

Commercial

 

 

 

 

 

CY7C63413C-XC

8KB

-

Die Lead-Free

Commercial

 

 

 

 

 

Document #: 38-08027 Rev. *B

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Contents Functional Overview FeaturesCypress Semiconductor Corporation CY7C63413C CY7C63513C CY7C63613C Logic Block Diagram Pin Definitions Programming ModelBit Data Stack Pointer DSP Address ModesMOV A,DSPINIT Buttons EQU 10h MOV A,buttonsInstruction Set Summary Operand Opcode CyclesMemory Organization Program Memory OrganizationReserved Program Memory begins hereData Memory Organization Register Summary O Register SummaryRegister Name Address Read/Write Function USB Address A, Endpoint 0 counter registerReset ClockingGeneral Purpose I/O Ports PinAddr Port 1 Data Addr Port 2 DataPort 0 Interrupt Enable Gpio Interrupt Enable PortsGpio Configuration Port Addr Port 0 Interrupt Enable+ default Addr Gpio Configuration RegisterDAC Port Cmos OutputDAC Port Interrupt Enable Addr DAC Port Interrupt EnableDAC Port Interrupts DAC Isink RegistersUSB Serial Interface Engine SIE USB Device USB Device Counter Registers Addr 0x11, 0x13 USB Device Counter RegistersData 0/1 Byte countBit Free-running Timer Timer LSB Timer RegisterAddr Timer Register LSB Timer MSB Timer Register Addr Timer Register MSBGlobal Interrupt Enable Register Addr USB End Point Interrupt Enable Register AddrInterrupts Gpio DACInterrupt Vectors Interrupt Vector AssignmentsInterrupt Vector Number ROM Address Function Interrupt LatencyUSB Register Mode Encoding Truth TablesEncoding NAKWhat the SIE does to Mode bits PID Status bits Interrupt? EncodingSet End Point Mode Setup Packet if acceptingControl Write Control ReadOut endpoint Power-On Reset Absolute Maximum RatingsParameter Min Max Unit Conditions General USB InterfaceSwitching Characteristics Differential Data Lines Ordering Information Ordering CodePackage Package Type Operating Size RangeDie Pad Locations DIe Pad Locations in microns Pad # Pin NameLead Shrunk Small Outline Package SP48 Package DiagramsLead 600-Mil Molded DIP P2 Package Diagrams Lead 300-Mil Soic S24.3/SZ24.3 PIN 1 IDIssue Orig. Description of Change Date Document HistoryDSG TYJ

CY7C63613C, CY7C63413C, CY7C63513C specifications

The Cypress CY7C63513C, CY7C63413C, and CY7C63613C are versatile programmable logic devices that are part of the Cypress family of microcontrollers designed for diverse applications. These devices are particularly well-suited for embedded systems, consumer electronics, and industrial control systems due to their robust features and technologies.

One of the standout characteristics of these devices is their programmable architecture, which allows for flexible design implementations. The CY7C63513C features 32 programmable I/O pins and an 8-bit microcontroller core, which provides ample resource allocation for various input/output operations. The device supports various communication interfaces, including SPI and I2C, enabling seamless integration into different system configurations.

The CY7C63413C is a highly adaptable component, offering similar features but with an enhanced flexibility in its I/O configuration, making it ideal for applications that require quick prototyping and development cycles. Its extensive instruction set allows for more complex processing tasks, catering to advanced applications in automation and signal processing.

On the other hand, the CY7C63613C provides an advanced level of integration with built-in support for multiple power management modes. This feature is crucial in modern battery-operated devices where energy conservation is a primary concern. Its low-power operation enhances the usability in portable applications while still maintaining performance.

In terms of performance, all three devices boast high-speed operation, with clock frequencies reaching up to 24 MHz. This ensures that they can efficiently handle tasks that require real-time processing, such as sensor data management and control algorithms. The devices are also equipped with an on-chip EEPROM and RAM, allowing for data storage and quick retrieval.

In addition to their performance characteristics, the CY7C63513C, CY7C63413C, and CY7C63613C are designed with reliability in mind. They incorporate robust error detection and correction features, ensuring data integrity during operation. This reliability is essential for critical applications, such as automotive systems and industrial automation.

Overall, the Cypress CY7 series presents an appealing solution for developers looking for a blend of flexibility, performance, and reliability in their embedded designs. Their programmability and support for multiple communication protocols make them a formidable choice in today’s fast-paced technological landscape, paving the way for innovative applications across various industries.
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