Cypress CY7C63413C manual DAC Port Interrupts, DAC Port Interrupt Enable, DAC Isink Registers

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CY7C63413C

CY7C63513C

CY7C63613C

Table 13.DAC Port Data

Addr: 0x30

 

DAC Port Data

 

 

 

 

 

 

 

 

 

 

 

 

Low current outputs

 

 

High current outputs

 

 

0.2 mA to 1.0 mA typical

 

 

3.2 mA to 16 mA typical

 

 

 

 

 

 

 

 

DAC[7]

DAC[6]

DAC[5]

DAC[4]

DAC[3]

DAC[2]

DAC[1]

DAC[0]

 

 

 

 

 

 

 

 

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

 

 

 

 

 

 

 

 

The DAC port provides the CY7C63513C with 8 program- mable current sink I/O pins. Writing a “1” to a DAC I/O pin disables the output current sink (Isink DAC) and drives the I/O pin HIGH through an integrated 14 Kohm resistor. When a “0” is written to a DAC I/O pin, the Isink DAC is enabled and the pull-up resistor is disabled. A “0” output will cause the Isink DAC to sink current to drive the output LOW. The amount of sink current for the DAC I/O pin is programmable over 16 values based on the contents of the DAC Isink Register for that output pin. DAC[1:0] are the two high current outputs that are programmable from a minimum of 3.2 mA to a maximum of 16 mA (typical). DAC[7:2] are low current outputs that are programmable from a minimum of 0.2 mA to a maximum of 1.0 mA (typical).

When a DAC I/O bit is written as a “1,” the I/O pin is either an output pulled high through the 14 Kohm resistor or an input with an internal 14 Kohm pull-up resistor. All DAC port data bits are set to “1” during reset.

DAC Port Interrupts

A DAC port interrupt can be enabled/disabled for each pin individually. The DAC Port Interrupt Enable register provides

Table 14.DAC Port Interrupt Enable

this feature with an interrupt mask bit for each DAC I/O pin. Writing a “1” to a bit in this register enables interrupts from the corresponding bit position. Writing a “0” to a bit in the DAC Port Interrupt Enable register disables interrupts from the corre- sponding bit position. All of the DAC Port Interrupt Enable register bits are cleared to “0” during a reset.

As an additional benefit, the interrupt polarity for each DAC pin is programmable with the DAC Port Interrupt Polarity register. Writing a “0” to a bit selects negative polarity (falling edge) that will cause an interrupt (if enabled) if a falling edge transition occurs on the corresponding input pin. Writing a “1” to a bit in this register selects positive polarity (rising edge) that will cause an interrupt (if enabled) if a rising edge transition occurs on the corresponding input pin. All of the DAC Port Interrupt Polarity register bits are cleared during a reset.

DAC Isink Registers

Each DAC I/O pin has an associated DAC Isink register to program the output sink current when the output is driven LOW. The first Isink register (0x38) controls the current for DAC[0], the second (0x39) for DAC[1], and so on until the Isink register at 0x3F controls the current to DAC[7].

Addr: 0x31

 

DAC Port Interrupt Enable

 

 

 

 

 

 

 

 

 

 

 

DAC[7]

DAC[6]

DAC[5]

DAC[4]

DAC[3]

DAC[2]

DAC[1]

DAC[0]

 

 

 

 

 

 

 

 

W

W

W

W

W

W

W

W

 

 

 

 

 

 

 

 

Table 15.DAC Port Interrupt Polarity

 

 

 

 

 

 

 

 

 

 

 

Addr: 0x32

 

DAC Port Interrupt Polarity

 

 

 

 

 

 

 

 

 

 

 

DAC[7]

DAC[6]

DAC[5]

DAC[4]

DAC[3]

DAC[2]

DAC[1]

DAC[0]

 

 

 

 

 

 

 

 

W

W

W

W

W

W

W

W

 

 

 

 

 

 

 

 

Table 16.DAC Port Isink

 

 

 

 

 

 

 

 

 

 

 

 

Addr: 0x38-0x3F

 

DAC Port Interrupt Polarity

 

 

 

 

 

 

 

 

 

 

Reserved

 

 

Isink Value

 

 

 

 

 

 

 

 

 

 

 

 

 

Isink[3]

Isink[2]

Isink[1]

Isink[0]

 

 

 

 

 

 

 

 

 

 

 

 

W

W

W

W

 

 

 

 

 

 

 

 

Document #: 38-08027 Rev. *B

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Contents Cypress Semiconductor Corporation FeaturesFunctional Overview CY7C63413C CY7C63513C CY7C63613C Logic Block Diagram Pin Definitions Programming ModelMOV A,DSPINIT Bit Data Stack Pointer DSPAddress Modes Buttons EQU 10h MOV A,buttonsInstruction Set Summary Operand Opcode CyclesReserved Memory OrganizationProgram Memory Organization Program Memory begins hereData Memory Organization Register Name Address Read/Write Function Register SummaryO Register Summary USB Address A, Endpoint 0 counter registerReset ClockingAddr Port 1 Data General Purpose I/O PortsPin Addr Port 2 DataGpio Configuration Port Port 0 Interrupt EnableGpio Interrupt Enable Ports Addr Port 0 Interrupt EnableDAC Port + defaultAddr Gpio Configuration Register Cmos OutputDAC Port Interrupts DAC Port Interrupt EnableAddr DAC Port Interrupt Enable DAC Isink RegistersUSB Serial Interface Engine SIE USB Device Data 0/1 USB Device Counter RegistersAddr 0x11, 0x13 USB Device Counter Registers Byte countAddr Timer Register LSB Bit Free-running TimerTimer LSB Timer Register Timer MSB Timer Register Addr Timer Register MSBInterrupts Global Interrupt Enable Register AddrUSB End Point Interrupt Enable Register Addr Gpio DACInterrupt Vector Number ROM Address Function Interrupt VectorsInterrupt Vector Assignments Interrupt LatencyEncoding USB Register Mode EncodingTruth Tables NAKWhat the SIE does to Mode bits PID Status bits Interrupt? EncodingControl Write Set End Point ModeSetup Packet if accepting Control ReadOut endpoint Parameter Min Max Unit Conditions General Power-On ResetAbsolute Maximum Ratings USB InterfaceSwitching Characteristics Differential Data Lines Package Package Type Operating Size Ordering InformationOrdering Code RangeDie Pad Locations DIe Pad Locations in microns Pad # Pin NameLead 600-Mil Molded DIP P2 Package DiagramsLead Shrunk Small Outline Package SP48 Package Diagrams Lead 300-Mil Soic S24.3/SZ24.3 PIN 1 IDDSG Issue Orig. Description of Change DateDocument History TYJ

CY7C63613C, CY7C63413C, CY7C63513C specifications

The Cypress CY7C63513C, CY7C63413C, and CY7C63613C are versatile programmable logic devices that are part of the Cypress family of microcontrollers designed for diverse applications. These devices are particularly well-suited for embedded systems, consumer electronics, and industrial control systems due to their robust features and technologies.

One of the standout characteristics of these devices is their programmable architecture, which allows for flexible design implementations. The CY7C63513C features 32 programmable I/O pins and an 8-bit microcontroller core, which provides ample resource allocation for various input/output operations. The device supports various communication interfaces, including SPI and I2C, enabling seamless integration into different system configurations.

The CY7C63413C is a highly adaptable component, offering similar features but with an enhanced flexibility in its I/O configuration, making it ideal for applications that require quick prototyping and development cycles. Its extensive instruction set allows for more complex processing tasks, catering to advanced applications in automation and signal processing.

On the other hand, the CY7C63613C provides an advanced level of integration with built-in support for multiple power management modes. This feature is crucial in modern battery-operated devices where energy conservation is a primary concern. Its low-power operation enhances the usability in portable applications while still maintaining performance.

In terms of performance, all three devices boast high-speed operation, with clock frequencies reaching up to 24 MHz. This ensures that they can efficiently handle tasks that require real-time processing, such as sensor data management and control algorithms. The devices are also equipped with an on-chip EEPROM and RAM, allowing for data storage and quick retrieval.

In addition to their performance characteristics, the CY7C63513C, CY7C63413C, and CY7C63613C are designed with reliability in mind. They incorporate robust error detection and correction features, ensuring data integrity during operation. This reliability is essential for critical applications, such as automotive systems and industrial automation.

Overall, the Cypress CY7 series presents an appealing solution for developers looking for a blend of flexibility, performance, and reliability in their embedded designs. Their programmability and support for multiple communication protocols make them a formidable choice in today’s fast-paced technological landscape, paving the way for innovative applications across various industries.
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