Cypress CY7C63613C, CY7C63513C, CY7C63413C manual Instruction Set Summary, Operand Opcode Cycles

Page 6

CY7C63413C

CY7C63513C

CY7C63613C

Instruction Set Summary

MNEMONIC

operand

opcode

cycles

 

MNEMONIC

operand

opcode

cycles

HALT

 

00

7

 

NOP

 

20

4

ADD A,expr

data

01

4

 

INC A

acc

21

4

ADD A,[expr]

direct

02

6

 

INC X

x

22

4

ADD A,[X+expr]

index

03

7

 

INC [expr]

direct

23

7

ADC A,expr

data

04

4

 

INC [X+expr]

index

24

8

ADC A,[expr]

direct

05

6

 

DEC A

acc

25

4

ADC A,[X+expr]

index

06

7

 

DEC X

x

26

4

SUB A,expr

data

07

4

 

DEC [expr]

direct

27

7

SUB A,[expr]

direct

08

6

 

DEC [X+expr]

index

28

8

SUB A,[X+expr]

index

09

7

 

IORD expr

address

29

5

SBB A,expr

data

0A

4

 

IOWR expr

address

2A

5

SBB A,[expr]

direct

0B

6

 

POP A

 

2B

4

SBB A,[X+expr]

index

0C

7

 

POP X

 

2C

4

OR A,expr

data

0D

4

 

PUSH A

 

2D

5

OR A,[expr]

direct

0E

6

 

PUSH X

 

2E

5

OR A,[X+expr]

index

0F

7

 

SWAP A,X

 

2F

5

AND A,expr

data

10

4

 

SWAP A,DSP

 

30

5

AND A,[expr]

direct

11

6

 

MOV [expr],A

direct

31

5

AND A,[X+expr]

index

12

7

 

MOV [X+expr],A

index

32

6

XOR A,expr

data

13

4

 

OR [expr],A

direct

33

7

XOR A,[expr]

direct

14

6

 

OR [X+expr],A

index

34

8

XOR A,[X+expr]

index

15

7

 

AND [expr],A

direct

35

7

CMP A,expr

data

16

5

 

AND [X+expr],A

index

36

8

CMP A,[expr]

direct

17

7

 

XOR [expr],A

direct

37

7

CMP A,[X+expr]

index

18

8

 

XOR [X+expr],A

index

38

8

MOV A,expr

data

19

4

 

IOWX [X+expr]

index

39

6

MOV A,[expr]

direct

1A

5

 

CPL

 

3A

4

MOV A,[X+expr]

index

1B

6

 

ASL

 

3B

4

MOV X,expr

data

1C

4

 

ASR

 

3C

4

MOV X,[expr]

direct

1D

5

 

RLC

 

3D

4

reserved

 

1E

 

 

RRC

 

3E

4

XPAGE

 

1F

4

 

RET

 

3F

8

 

 

 

 

 

 

 

 

 

MOV A,X

 

40

4

 

DI

 

70

4

MOV X,A

 

41

4

 

EI

 

72

4

MOV PSP,A

 

60

4

 

RETI

 

73

8

 

 

 

 

 

 

 

 

 

CALL

addr

50-5F

10

 

 

 

 

 

 

 

 

 

 

 

 

 

 

JMP

addr

80-8F

5

 

JC

addr

C0-CF

5

CALL

addr

90-9F

10

 

JNC

addr

D0-DF

5

JZ

addr

A0-AF

5

 

JACC

addr

E0-EF

7

JNZ

addr

B0-BF

5

 

INDEX

addr

F0-FF

14

 

 

 

 

 

 

 

 

 

Document #: 38-08027 Rev. *B

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Contents Features Functional OverviewCypress Semiconductor Corporation CY7C63413C CY7C63513C CY7C63613C Logic Block Diagram Pin Definitions Programming ModelMOV A,DSPINIT Bit Data Stack Pointer DSPAddress Modes Buttons EQU 10h MOV A,buttonsInstruction Set Summary Operand Opcode CyclesReserved Memory OrganizationProgram Memory Organization Program Memory begins hereData Memory Organization Register Name Address Read/Write Function Register SummaryO Register Summary USB Address A, Endpoint 0 counter registerReset ClockingAddr Port 1 Data General Purpose I/O PortsPin Addr Port 2 DataGpio Configuration Port Port 0 Interrupt EnableGpio Interrupt Enable Ports Addr Port 0 Interrupt EnableDAC Port + defaultAddr Gpio Configuration Register Cmos OutputDAC Port Interrupts DAC Port Interrupt EnableAddr DAC Port Interrupt Enable DAC Isink RegistersUSB Serial Interface Engine SIE USB Device Data 0/1 USB Device Counter RegistersAddr 0x11, 0x13 USB Device Counter Registers Byte countAddr Timer Register LSB Bit Free-running TimerTimer LSB Timer Register Timer MSB Timer Register Addr Timer Register MSBInterrupts Global Interrupt Enable Register AddrUSB End Point Interrupt Enable Register Addr Gpio DACInterrupt Vector Number ROM Address Function Interrupt VectorsInterrupt Vector Assignments Interrupt LatencyEncoding USB Register Mode EncodingTruth Tables NAKWhat the SIE does to Mode bits PID Status bits Interrupt? EncodingControl Write Set End Point ModeSetup Packet if accepting Control ReadOut endpoint Parameter Min Max Unit Conditions General Power-On ResetAbsolute Maximum Ratings USB InterfaceSwitching Characteristics Differential Data Lines Package Package Type Operating Size Ordering InformationOrdering Code RangeDie Pad Locations DIe Pad Locations in microns Pad # Pin NamePackage Diagrams Lead Shrunk Small Outline Package SP48Lead 600-Mil Molded DIP P2 Package Diagrams Lead 300-Mil Soic S24.3/SZ24.3 PIN 1 IDDSG Issue Orig. Description of Change DateDocument History TYJ

CY7C63613C, CY7C63413C, CY7C63513C specifications

The Cypress CY7C63513C, CY7C63413C, and CY7C63613C are versatile programmable logic devices that are part of the Cypress family of microcontrollers designed for diverse applications. These devices are particularly well-suited for embedded systems, consumer electronics, and industrial control systems due to their robust features and technologies.

One of the standout characteristics of these devices is their programmable architecture, which allows for flexible design implementations. The CY7C63513C features 32 programmable I/O pins and an 8-bit microcontroller core, which provides ample resource allocation for various input/output operations. The device supports various communication interfaces, including SPI and I2C, enabling seamless integration into different system configurations.

The CY7C63413C is a highly adaptable component, offering similar features but with an enhanced flexibility in its I/O configuration, making it ideal for applications that require quick prototyping and development cycles. Its extensive instruction set allows for more complex processing tasks, catering to advanced applications in automation and signal processing.

On the other hand, the CY7C63613C provides an advanced level of integration with built-in support for multiple power management modes. This feature is crucial in modern battery-operated devices where energy conservation is a primary concern. Its low-power operation enhances the usability in portable applications while still maintaining performance.

In terms of performance, all three devices boast high-speed operation, with clock frequencies reaching up to 24 MHz. This ensures that they can efficiently handle tasks that require real-time processing, such as sensor data management and control algorithms. The devices are also equipped with an on-chip EEPROM and RAM, allowing for data storage and quick retrieval.

In addition to their performance characteristics, the CY7C63513C, CY7C63413C, and CY7C63613C are designed with reliability in mind. They incorporate robust error detection and correction features, ensuring data integrity during operation. This reliability is essential for critical applications, such as automotive systems and industrial automation.

Overall, the Cypress CY7 series presents an appealing solution for developers looking for a blend of flexibility, performance, and reliability in their embedded designs. Their programmability and support for multiple communication protocols make them a formidable choice in today’s fast-paced technological landscape, paving the way for innovative applications across various industries.