Cypress CY7C037V, CY7C037AV, CY7C027V, CY7C028V, CY7C027AV manual Features, Logic Block Diagram

CY7C027V/027VN/027AV/028V

CY7C037V/037AV/038V

3.3V 32K/64K x 16/18 Dual-Port Static

RAM

Features

■True Dual-Ported memory cells which allow simultaneous access of the same memory location

■32K x 16 organization (CY7C027V/027VN/027AV [1])

■64K x 16 organization (CY7C028V)

■32K x 18 organization (CY7C037V/037AV[2])

■64K x 18 organization (CY7C038V)

■0.35 micron CMOS for optimum speed and power

■High speed access: 15, 20, and 25 ns

■Low operating power

■Active: ICC = 115 mA (typical)

■Standby: ISB3 = 10 μA (typical)

■Fully asynchronous operation

■Automatic power down

■Expandable data bus to 32/36 bits or more using Master/Slave chip select when using more than one device

■On-chip arbitration logic

■Semaphores included to permit software handshaking between ports

■INT flag for port-to-port communication

■Separate upper-byte and lower-byte control

■Dual chip enables

■Pin select for Master or Slave

■Commercial and Industrial temperature ranges

■100-pin Pb-free TQFP and 100-pin TQFP

Logic Block Diagram
R/WL									R/WR
UBL									UBR
CE0L									CE0R
CE1L		CEL					CER		CE1R
LBL									LBR
OEL									OER
I/O8/9L–I/O[3]15/17L		8/9					8/9	I/O8/9L–I/O15/17R[3]
		8/9		I/O	I/O		8/9
	[4]								[4]
I/O0L–I/O7/8L				Control	Control			I/O0L–I/O7/8R
	[5]	15/16	Address	True Dual-Ported		Address	15/16		[5]
A0L–A14/15L			Decode		RAM Array	Decode		A0R–A14/15R
	[5]		15/16			15/16			[5]
A0L–A14/15L								A0R–A14/15R
CEL					Interrupt				CER
OEL					Semaphore				OER
R/WL					Arbitration				R/WR
SEML	[6]							[6]	SEMR
BUSY									BUSY
	L
									R
INTL									INTR
UBL									UBR
LBL					M/S				LBR
Notes
1. CY7C027V, CY7C027VN and CY7C027AV are functionally identical.
2. CY7C037V and CY7C037AV are functionally identical.
3. I/O8–I/O15for x16 devices; I/O9–I/O17for x18 devices.
4. I/O0–I/O7for x16 devices; I/O0–I/O8for x18 devices.
5. A0–A14for 32K; A0–A15for 64K devices.
6. BUSY is an output in master mode and an input in slave mode.

Cypress Semiconductor Corporation • 198 Champion Court	•	San Jose, CA 95134-1709	•	408-943-2600
Document #: 38-06078 Rev. *B		Revised December 09, 2008

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