Cypress CY7C027V, CY7C037AV Switching Waveforms, Read Cycle No Either Port Address Access15, 16

CY7C027V/027VN/027AV/028V

CY7C037V/037AV/038V

Switching Waveforms

Figure 4. Read Cycle No. 1 (Either Port Address Access)[15, 16, 17]

		tRC
ADDRESS
	tAA	tOHA
	tOHA
DATA OUT	PREVIOUS DATA VALID	DATA VALID

CE and

LB or UB

OE

DATA OUT

ICC

CURRENT

ISB

Figure 5. Read Cycle No. 2 (Either Port CE/OE Access)[15, 18, 19]

	tACE
	tHZCE
	tDOE
	tHZOE
	tLZOE
	DATA VALID
	tLZCE
tPU	t
	PD

Figure 6. Read Cycle No. 3 (Either Port)[15, 17, 18, 19]

tRC

ADDRESS

tAA

UB or LB

tLZCE

tABE

CE

tACE

tLZCE

DATA OUT

tOHA

tHZCE

tHZCE

Notes

15.R/W is HIGH for read cycles.

16.Device is continuously selected CE = VIL and UB or LB = VIL. This waveform cannot be used for semaphore reads.

17.OE = VIL.

18.Address valid prior to or coincident with CE transition LOW.

19.To access RAM, CE = VIL, UB or LB = VIL, SEM = VIH. To access semaphore, CE = VIH, SEM = VIL.

Document #: 38-06078 Rev. *B Page 9 of 18

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