Cypress CY14B104K, CY14B104M manual Software Controlled Store and Recall Cycle

		PRELIMINARY			CY14B104K, CY14B104M
Software Controlled STORE and RECALL Cycle
In the following table, the software controlled STORE and RECALL cycle parameters are listed. [28, 29]
Parameters		Description	20 ns		25 ns		45 ns		Unit
			Min	Max	Min	Max	Min	Max
tRC	STORE/RECALL Initiation Cycle Time		20		25		45		ns
tSA	Address Setup Time		0		0		0		ns
tCW	Clock Pulse Width		15		20		30		ns
tHA	Address Hold Time		0		0		0		ns
tRECALL	RECALL Duration			200		200		200	μs
tSS [32, 33]	Soft Sequence Processing Time			100		100		100	μs

Switching Waveforms

Figure 13. CE and OE Controlled Software STORE and RECALL Cycle[29]

		tRC	tRC
Address		Address #1	Address #6
	tSA	tCW	tCW
CE		tHA	tHA
t
	SA	tHA		t
				HA
OE
			tDELAY	tHHHD
HSB (STORE only)	tLZCE	tHZCE		tLZHSB
DQ (DATA)				High Impedance
				tSTORE/tRECALL
RWI

Figure 14. Autostore Enable and Disable Cycle

	tRC
Address	Address #1
tSA	tCW
CE
tSA
OE
tLZCE
DQ (DATA)

	tRC
	Address #6
	tCW
tHA	tHA
tHA
	t
	HA
tHZCE	tSS
	tDELAY

Notes

28.The software sequence is clocked with CE controlled or OE controlled reads.

29.The six consecutive addresses must be read in the order listed in Table 1. WE must be HIGH during all six consecutive cycles.

30.This is the amount of time it takes to take action on a soft sequence command. Vcc power must remain HIGH to effectively register command.

31.Commands such as STORE and RECALL lock out IO until operation is complete which further increases this time. See the specific command.

Document #: 001-07103 Rev. *K Page 21 of 31

[+] Feedback