Cypress CY14B104K WDF Watchdog Timer Flag, WIE Watchdog Interrupt, PF Power Fail Flag, High/Low

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		PRELIMINARY	CY14B104K, CY14B104M
			CY14B104K, CY14B104M

		Figure 4. RTC Recommended Component Configuration
		Figure 4. RTC Recommended Component Configuration

Recommended Values

Y1 = 32.768 KHz (6 pF)

C1 = 21 pF

C2 = 21 pF

Note: The recommended values for C1 and C2 include board trace capacitance.

WDF

Figure 5. Interrupt Block Diagram

Watchdog

Timer

Power

Monitor

VINT

Clock

Alarm

WIE

PFE

AIE

	P/L		VCC

Pin Driver

H/L VSS

	WDF - Watchdog Timer Flag
	WIE - Watchdog Interrupt
	Enable
	PF - Power Fail Flag
INT	PFE - Power Fail Enable
INT	AF - Alarm Flag
	AIE - Alarm Interrupt Enable
	P/L - Pulse Level
	H/L - High/Low

Document #: 001-07103 Rev. *K

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Contents Features Functional DescriptionCypress Semiconductor Corporation 198 Champion Court Pinouts Sram Read Device OperationSram Write AutoStore OperationHardware Store HSB Operation Hardware Recall Power UpSoftware Recall Software StoreA15 A06 Mode Power Mode SelectionPreventing AutoStore StoreData Protection Noise ConsiderationsReal Time Clock Operation Alarm Watchdog TimerCalibrating the Clock Interrupt Register Power MonitorInterrupts Flags RegisterPF Power Fail Flag WDF Watchdog Timer FlagPFE Power Fail Enable AF Alarm FlagOscen WDSWDF Oscf For the register is 0x7FFF9 0x3FFF9 Time Keeping SecondsTime-base 0x7FFF5 0x3FFF5 Alarm DayWatchdog Write only. Reading it always returns aCenturies 0x7FFF0 0x3FFF0 Flags 0x7FFF2 0x3FFF2 Alarm SecondsThis condition and write 0 to clear this flag Document # 001-07103 Rev. *KRange Ambient Temperature DC Electrical CharacteristicsMaximum Ratings Operating RangeCapacitance Data Retention and EnduranceThermal Resistance AC Test ConditionsHot Temperature 85 oC RTC Backup CurrentRTC Battery Pin Voltage RTC Capacitor Pin Voltage TOCS RTC Oscillator Time to StartSwitching Waveforms AC Switching CharacteristicsParameters Sram Read Cycle Sram Write CycleStandby Active Data Output High Impedance Output Data ValidAddress Valid Data Input Input Data ValidInput Data Valid High Impedance Data Input Data OutputNot applicable for RTC register writes Address Address ValidParameters Description 20 ns 25 ns 45 ns Unit Min Max AutoStore/Power Up RecallSoftware Controlled Store and Recall Cycle Hardware Store Cycle To Output Active Time when write latch not setDescription 20 ns 25 ns 45 ns Unit Min Hardware Store Pulse WidthFor x16 Configuration For x8 ConfigurationInputs and Outputs Mode Power Truth Table For Sram OperationsPart Numbering Nomenclature CY14 B 104 K ZS P 20 X C T ZS TsopNvsram Ordering Information Pin Tsop II Package Diagrams51-85160 TUP Document HistoryPCI UHAGVCH/PYRS Footnote 1 and 8 referenced for Mode selection Table Added 20 ns access speed in Features6 updated Data protection description 6 Updated Starting and stopping the oscillator descriptionSales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC SolutionsUSB

Figure 4. RTC Recommended Component Configuration

Figure 5. Interrupt Block Diagram

WDF - Watchdog Timer Flag

WIE - Watchdog Interrupt

PF - Power Fail Flag

PFE - Power Fail Enable

AF - Alarm Flag

AIE - Alarm Interrupt Enable

P/L - Pulse Level

H/L - High/Low