Maxtor 91792D7, 91024D4, 90750D3 Pin Description Table, PIN Name Signal Name Signal Description

Page 34

AT INTERFACE DESCRIPTION

Pin Description Table

PIN NAME

PIN

I/O

SIGNAL NAME

SIGNAL DESCRIPTION

 

 

 

 

 

RESET -

01

I

Host Reset

Reset signal from the host system. Active during power up and inactive after.

 

 

 

 

 

DD0

17

I/O

Host Data Bus

16 bit bi-directional data bus between host and drive. Lower 8 bits used for register

 

 

 

 

and ECC byte transfers. All 16 bits used for data transfers.

DD1

15

I/O

 

 

 

 

 

 

 

DD2

13

I/O

 

 

 

 

 

 

 

DD3

11

I/O

 

 

 

 

 

 

 

DD4

09

I/O

 

 

 

 

 

 

 

DD5

07

I/O

 

 

DD6

05

I/O

 

 

DD7

03

I/O

 

 

DD8

04

I/O

 

 

 

 

 

 

 

DD9

06

I/O

 

 

 

 

 

 

 

DD10

08

I/O

 

 

 

 

 

 

 

DD11

10

I/O

 

 

 

 

 

 

 

DD12

12

I/O

 

 

 

 

 

 

 

DD13

14

I/O

 

 

 

 

 

 

 

DD14

16

I/O

 

 

DD15

18

I/O

 

 

DMARQ

21

O

DMA Request

This signal is used with DMACK for DMA transfers. By asserting this signal, the

 

 

 

 

drive indicates that data is ready to be transfered to and from the host.

DIOW -

23

I

Host I/O Write

Rising edge of Write strobe clocks data from the host data bus to a register on the

STOP

 

 

 

drive.

DIOR -

25

I

Host I/O Read

Read strobe enables data from a register on the drive onto the host data bus.

HDMARDY

 

 

 

DMA ready during UltraDMA data in bursts.

HSTROBE

 

 

 

Data strobe during UltraDMA data out bursts.

 

 

 

 

 

 

 

 

 

IORDY

27

O

I/O Channel Ready

This signal may be driven low by the drive to insert wait states into host I/O cycles.

DDMARDY

 

 

 

DMA ready during UltraDMA data out bursts.

-

 

 

 

Data strobe during UltraDMA data in bursts.

DSTROBE

 

 

 

 

CSEL

28

 

Cable Select

Used for Master/Slave selection via cable. Requires special cabling on host system

 

 

 

 

and installation of Cable Select jumper.

DMACK -

29

I

DMA Acknowledge

This signal is used with DMARQ for DMA transfers. By asserting this signal, the

 

 

 

 

host is acknowledging the receipt of data or is indicating that data is available.

 

 

 

 

 

INTRQ

31

O

Host Interrupt

Interrupt to the host asserted when the drive requires attention from the host.

 

 

 

Request

 

IOCS16

32

 

Device 16 bit I/O

Obsolete

 

 

 

 

 

PDIAG -

34

I/O

Passed Diagnostic

Output by drive when in Slave mode; Input to drive when in Master mode.

 

 

 

 

 

DA0

35

I

Host Address Bus

3 bit binary address from the host to select a register in the drive.

 

 

 

 

 

DA1

33

I

 

 

 

 

 

 

 

DA2

36

I

 

 

 

 

 

 

 

CS0 -

37

I

Host Chip Select 0

Chip select from the host used to access the Command Block registers in the drive.

 

 

 

 

This signal is a decode of I/O addresses 1F0 - 1F7 hex.

CS1 -

38

I

Host Chip Select 1

Chip select from the host used to access the Control registers in the drive. This

 

 

 

 

signal is a decode of I/O addresses 3F6 - 3F7 hex.

DASP -

39

I/O

Drive Active/Drive 1

Time-multiplexed, open collector output which indicates that a drive is active, or that

 

 

 

Present

device 1 is present.

GND

02

N/A

Ground

Signal ground.

 

 

 

 

 

 

19

 

 

 

 

 

 

 

 

 

22

 

 

 

 

 

 

 

 

 

24

 

 

 

 

 

 

 

 

 

26

 

 

 

 

 

 

 

 

 

30

 

 

 

 

 

 

 

 

 

40

 

 

 

 

 

 

 

 

KEY

20

N/A

Key

Pin used for keying the interface connector.

 

 

 

 

 

5 – 23

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Image 34
Page 33 Page 35
Contents HA RD Drive Produc T MA Nual DiamondMax Plus Revisions Manual No Before You Begin U T I O NContents Product Specifications Handling and InstallationAT Interface Description Host Software InterfaceService and Support Interface CommandsGlossary Figures Manual Organization IntroductionMaxtor Corporation AbbreviationsKey Words Signal ConventionsConventions NumberingDiamondMax Plus 5120 Key Features Product DescriptionProduct Features Functional / InterfaceDefect Management Zone DMZ On-the-Fly Hardware Error Correction Code ECCLogical Block Addressing Software ECC CorrectionBuffer Segmentation Read-Ahead ModeCache Management Automatic Write Reallocation AWRMajor HDA Components Cylinder Limitation Subsystem ConfigurationJumper Location/Configuration Dual Drive SupportPerformance Specifications Product SpecificationsDrive Configuration Models and CapacitiesPhysical Dimensions Parameter Standard MetricEPA Energy Star Compliance Power RequirementsPower Mode Definitions Environmental LimitsReliability Specifications Shock and VibrationRadiated Electromagnetic Field Emissions EMC Compliance Safety Regulatory ComplianceCanadian Emissions Statement Pre-formatted Drive Handling and InstallationHard Drive Handling Precautions Important NoticeUnpacking and Inspection Multi-pack Shipping ContainerRecommended Mounting Configuration Physical InstallationRepacking Before You Begin General Requirements Mounting Drive in System Attaching Interface Power Cables System Setup Hard Drive Preparation System Hangs During Boot AT Interface Description Interface ConnectorSignal Pin Description SummaryPIN Name Signal Name Signal Description Pin Description TableTiming Parameters Mode PIO TimingDMA Timing Ultra DMA Timing Timing Parameters all times in nanosecondsSustained Ultra DMA Data In Burst Device Terminating an Ultra DMA Data In Burst Initiating an Ultra DMA Data Out Burst Device Pausing an Ultra DMA Data Out Burst Device Terminating an Ultra DMA Data Out Burst Host Software Interface Error RegisterFeatures Register Task File RegistersCylinder Number Registers Sector Count RegisterSector Number Register Device/Head RegisterCommand Register Command Name Command Code Parameters Used SDH SummaryDevice Control Register Control Diagnostic RegistersAlternate Status Register Digital Input RegisterReset Handling Reset and Interrupt HandlingInterrupt Handling Interface Commands Set Feature CommandsRead Sectors Read CommandsRead Verify Sectors Read DMA Read MultipleWrite Sectors Write CommandsSet Multiple Mode Write Verify SectorsWrite Multiple Write DMASet Feature Commands Set Features ModePower Mode Commands Sleep Mode Initialization Commands Identify Drive15-8 = PIO data transfer mode = Write Cache enabled Initialize Drive Parameters Execute Drive Diagnostic Seek, Format and Diagnostic CommandsFormat Track A.R.T. Command Set Execute S.M.A.R.TNo Quibble Service Service and SupportService Policy SupportCustomer Service MaxFax ServiceInternet Glossary Error Correction Code ECC Direct AccessDirect Memory Access Error FreeFile Allocation Table FAT Hard ErrorHead Disk Assembly HDA Flux Changes PER InchLogical Block Addressing Phase Locked Loop PLLLogical Address Logical SectorRecoverable Error Random Access Memory RAMRead Gate Signal Sector Pulse SignalWrite Gate Signal UN-CORRECTABLE ErrorUnrecoverable Error THIN-FILM Media
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