Transcend Information CF 133X, TS4GCF133, TS8GCF133, TS1GCF133, TS16GCF133, TS32GCF133, TS2GCF133 Wait

Page 11

TS1G~32GCF133

 

133X CompactFlash Card

 

 

 

 

 

 

 

 

 

 

 

 

Signal Name

Dir.

Pin

Description

-VS1

O

33

Voltage Sense Signals. -VS1 is grounded on the Card and sensed by the Host so

-VS2

 

40

that the CompactFlash Storage Card CIS can be read at 3.3 volts and -VS2 is

(PC Card Memory Mode)

 

 

reserved by PCMCIA for a secondary voltage and is not connected on the Card.

-VS1

 

 

This signal is the same for all modes.

-VS2

 

 

 

 

(PC Card I/O Mode)

 

 

 

 

-VS1

 

 

This signal is the same for all modes.

-VS2

 

 

 

 

(True IDE Mode)

 

 

 

 

-WAIT

O

42

The -WAIT signal is driven low by the CompactFlash Storage Card to signal the

(PC Card Memory Mode)

 

 

host to delay completion of a memory or I/O cycle that is in progress.

-WAIT

 

 

This signal is the same as the PC Card Memory Mode signal.

(PC Card I/O Mode)

 

 

 

 

 

 

IORDY

 

 

In True IDE Mode, except in Ultra DMA modes, this output signal may be used as

(True IDE Mode – Except

 

 

IORDY.

Ultra DMA Mode)

 

 

 

 

-DDMARDY

 

 

In True IDE Mode, when Ultra DMA mode DMA Write is active, this signal is

 

 

asserted by the host to indicate that the device is read to receive Ultra DMA

(True IDE Mode – Ultra DMA

 

 

 

 

data-in bursts. The device may negate -DDMARDY to pause an Ultra DMA

Write Mode)

 

 

 

 

transfer.

 

 

 

 

DSTROBE

 

 

In True IDE Mode, when Ultra DMA mode DMA Write is active, this signal is the

(True IDE Mode – Ultra

 

 

data out strobe generated by the device. Both the rising and falling edge of

DMA Read Mode)

 

 

DSTROBE cause data to be latched by the host. The device may stop

 

 

 

 

 

 

 

 

generating DSTROBE edges to pause an Ultra DMA data-out burst.

-WE

I

36

This is a signal driven by the host and used for strobing memory write data to the

(PC Card Memory Mode)

 

 

registers of the CompactFlash Storage Card when the card is configured in the

 

 

 

 

memory interface mode. It is also used for writing the configuration registers.

-WE

 

 

In PC Card I/O Mode, this signal is used for writing the configuration registers.

(PC Card I/O Mode)

 

 

 

 

-WE

 

 

In True IDE Mode, this input signal is not used and should be connected to VCC

(True IDE Mode)

 

 

by the host.

WP

O

24

Memory Mode – The CompactFlash Storage Card does not have a write protect

(PC Card Memory Mode)

switch. This signal is held low after the completion of the reset initialization

Write Protect

 

 

sequence.

-IOIS16

 

 

I/O Operation – When the CompactFlash Storage Card is configured for I/O

(PC Card I/O Mode)

 

 

Operation Pin 24 is used for the -I/O Selected is 16 Bit Port (-IOIS16) function. A

 

 

 

 

Low signal indicates that a 16 bit or odd byte only operation can be performed at

 

 

 

 

the addressed port.

-IOCS16

 

 

In True IDE Mode this output signal is asserted low when this device is expecting

(True IDE Mode)

 

 

a word data transfer cycle.

 

 

 

 

 

 

Transcend Information Inc.

 

11

 

Image 11
Contents Description Placement FeaturesDimensions 133X CompactFlash CardTranscend Block Diagram Pin Assignments and Pin Type TS1G~32GCF133 Dir Signal DescriptionGND Inpack Iowr VCC Wait Electrical Specification Output Drive Type Output Drive Characteristics Signal Interface Resistor is optional Additional Requirements for CF Advanced Timing ModesTable Typical Series Termination for Ultra DMA 133X CompactFlash CardUltra DMA Electrical Requirements Series termination required for Ultra DMA operationUltra DMA Mode Cabling Requirement Attribute Memory Read Timing Specification TS1G~32GCF133133X CompactFlash Card Common Memory Read Timing Specification Common Memory Write Timing Specification Input Read Timing Specification TS1G~32GCF133 Output Write Timing Specification TS1G~32GCF133 True IDE PIO Mode Read/Write Timing Specification TS1G~32GCF133 Table Ultra DMA Data Burst Timing True IDE Ultra DMA Mode Read/Write Timing Specification133X CompactFlash Card TS1G~32GCF133 TS1G~32GCF133 TS1G~32GCF133 Multiple Function CompactFlash Storage Cards Card ConfigurationAttribute Memory Function Attribute Memory FunctionConfiguration Option Register Base + 00h in Attribute Memory TS1G~32GCF133 Pin Replacement Register Base + 04h in Attribute Memory Socket and Copy Register Base + 06h in Attribute Memory Transfer Function Table Pcmcia Mode I/O FunctionTable Common Memory Function Common Memory Transfer FunctionTrue IDE Mode I/O Transfer Function Metaformat Overview CF-ATA Drive Register Set Definition and Protocol Table Primary and Secondary I/O Decoding Primary and Secondary Address ConfigurationsTable Contiguous I/O Decoding Contiguous I/O Mapped AddressingMemory Mapped Addressing True IDE Mode AddressingData Register Address 1F0h170hOffset 0,8,9 CF-ATA RegistersCylinder Low LBA 15-8 Register Address 1F4h174h Offset Feature Register Address 1F1h171h Offset 1, 0Dh Write OnlySector Count Register Address 1F2h172h Offset Sector Number LBA 7-0 Register Address 1F3h173h OffsetTS1G~32GCF133 Device Control Register Address 3F6h376h Offset Eh Card Drive Address Register Address 3F7h377h Offset Fh LBA CF-ATA Command SetDefinitions Check Power Mode 98h or E5h Erase Sectors C0h Execute Drive Diagnostic 90hFormat Track 50h Flush Cache E7hData Field Type Information Identify Device EchTS1G~32GCF133 0X00h Word 6 Default Number of Sectors per Track Word 0 General ConfigurationWord 1 Default Number of Cylinders Word 3 Default Number of HeadsWord 22 ECC Count PIO Data Transfer Cycle Timing ModeWords 7-8 Number of Sectors per Card Words 10-19 Serial NumberWord 64 Advanced PIO transfer modes supported Multiple Sector SettingTotal Sectors Addressable in LBA Mode Multiword DMA transferWord 68 Minimum PIO transfer cycle time with Iordy Words 82-84 Features/command sets supportedWord 88 Ultra DMA Modes Supported and Selected Words 85-87 Features/command sets enabledWord 128 Security Status Word 91 Advanced power management level valueWord 160 Power Requirement Description Word 89 Time required for Security erase unit completionWord 162 Key Management Schemes Supported Value Maximum PIO mode timing selectedValue Maximum Multiword DMA timing mode supported Value Current PIO timing mode selectedIdle 97h or E3h Value Current Multiword DMA timing mode selectedValue Maximum Pcmcia IO timing mode Supported Value Maximum Memory timing mode SupportedNOP 00h Idle Immediate 95h or E1hInitialize Drive Parameters 91h Read DMA C8h Read Long Sector 22h or 23h Read Buffer E4hTS1G~32GCF133 Seek 7Xh Feature Supported Set Features EFh133X CompactFlash Card TS1G~32GCF133 Translate Sector Information Standby Immediate 94h or E0h Translate Sector 87hWear Level F5h Write Buffer E8h Write DMA CAh TS1G~32GCF133 TS1G~32GCF133 Error Posting Smart Command Set Smart Feature Register Values Smart Command SetDecription Smart Data Structure