Transcend Information CF 133X Idle 97h or E3h, Value Current Multiword DMA timing mode selected

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TS1G~32GCF133		133X CompactFlash Card

2PIO Mode 6

3-7 Reserved

Bits 11-9: Advanced True IDE Multiword DMA Mode Selected Indicates the current True IDE Multiword DMA Mode Selected on the card.

Value	Current Multiword DMA timing mode selected
0	Specified in word 63
1	Multiword DMA Mode 3
2	Multiword DMA Mode 4
3-7	Reserved

Bits 15-12 are reserved.

Word 164: CF Advanced PCMCIA I/O and Memory Timing Modes Capabilities and Settings

This word describes the capabilities and current settings for CFA defined advanced timing modes using the Memory and PCMCIA I/O interface.

Notice! The use of PCMCIA I/O or Memory modes that are 100ns or faster impose significant restrictions on the implementation of the host:

Additional Requirements for CF Advanced Timing Modes.

Bits 2-0: Maximum Advanced PCMCIA I/O Mode Support Indicates the maximum I/O timing mode supported by the card.

Value	Maximum PCMCIA IO timing mode Supported
0	255ns Cycle PCMCIA I/O Mode
1	120ns Cycle PCMCIA I/O Mode
2	100ns Cycle PCMCIA I/O Mode
3	80ns Cycle PCMCIA I/O Mode
4-7	Reserved

Bits 5-3: Maximum Memory timing mode supported

Indicates the Maximum Memory timing mode supported by the card.

Bits 15-6: Reserved.

Value	Maximum Memory timing mode Supported
0	250ns Cycle Memory Mode
1	120ns Cycle Memory Mode
2	100ns Cycle Memory Mode
3	80ns Cycle Memory Mode
4-7	Reserved

Idle - 97h or E3h

This command causes the CompactFlash Storage Card to set BSY, enter the Idle mode, clear BSY and generate an interrupt. If the sector count is non-zero, it is interpreted as a timer count with each count being 5 milliseconds and the automatic power down mode is enabled. If the sector count is zero, the automatic power down mode is disabled. Note that this time base (5 msec) is different from the ATA specification.

Transcend Information Inc.

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Contents Description Placement FeaturesDimensions 133X CompactFlash CardTranscend Block Diagram Pin Assignments and Pin Type TS1G~32GCF133 Dir Signal DescriptionGND Inpack Iowr VCC Wait Electrical Specification Output Drive Type Output Drive Characteristics Signal Interface Resistor is optional Additional Requirements for CF Advanced Timing ModesTable Typical Series Termination for Ultra DMA 133X CompactFlash CardUltra DMA Electrical Requirements Series termination required for Ultra DMA operationUltra DMA Mode Cabling Requirement Attribute Memory Read Timing Specification TS1G~32GCF133133X CompactFlash Card Common Memory Read Timing Specification Common Memory Write Timing Specification Input Read Timing Specification TS1G~32GCF133 Output Write Timing Specification TS1G~32GCF133 True IDE PIO Mode Read/Write Timing Specification TS1G~32GCF133 Table Ultra DMA Data Burst Timing True IDE Ultra DMA Mode Read/Write Timing Specification133X CompactFlash Card TS1G~32GCF133 TS1G~32GCF133 TS1G~32GCF133 Multiple Function CompactFlash Storage Cards Card ConfigurationAttribute Memory Function Attribute Memory FunctionConfiguration Option Register Base + 00h in Attribute Memory TS1G~32GCF133 Pin Replacement Register Base + 04h in Attribute Memory Socket and Copy Register Base + 06h in Attribute Memory Transfer Function Table Pcmcia Mode I/O FunctionTable Common Memory Function Common Memory Transfer FunctionTrue IDE Mode I/O Transfer Function Metaformat Overview CF-ATA Drive Register Set Definition and Protocol Table Primary and Secondary I/O Decoding Primary and Secondary Address ConfigurationsTable Contiguous I/O Decoding Contiguous I/O Mapped AddressingMemory Mapped Addressing True IDE Mode AddressingData Register Address 1F0h170hOffset 0,8,9 CF-ATA RegistersCylinder Low LBA 15-8 Register Address 1F4h174h Offset Feature Register Address 1F1h171h Offset 1, 0Dh Write OnlySector Count Register Address 1F2h172h Offset Sector Number LBA 7-0 Register Address 1F3h173h OffsetTS1G~32GCF133 Device Control Register Address 3F6h376h Offset Eh Card Drive Address Register Address 3F7h377h Offset Fh LBA CF-ATA Command SetDefinitions Check Power Mode 98h or E5h Erase Sectors C0h Execute Drive Diagnostic 90hFormat Track 50h Flush Cache E7hData Field Type Information Identify Device EchTS1G~32GCF133 0X00h Word 6 Default Number of Sectors per Track Word 0 General ConfigurationWord 1 Default Number of Cylinders Word 3 Default Number of HeadsWord 22 ECC Count PIO Data Transfer Cycle Timing ModeWords 7-8 Number of Sectors per Card Words 10-19 Serial NumberWord 64 Advanced PIO transfer modes supported Multiple Sector SettingTotal Sectors Addressable in LBA Mode Multiword DMA transferWord 68 Minimum PIO transfer cycle time with Iordy Words 82-84 Features/command sets supportedWord 88 Ultra DMA Modes Supported and Selected Words 85-87 Features/command sets enabledWord 128 Security Status Word 91 Advanced power management level valueWord 160 Power Requirement Description Word 89 Time required for Security erase unit completionWord 162 Key Management Schemes Supported Value Maximum PIO mode timing selectedValue Maximum Multiword DMA timing mode supported Value Current PIO timing mode selectedIdle 97h or E3h Value Current Multiword DMA timing mode selectedValue Maximum Pcmcia IO timing mode Supported Value Maximum Memory timing mode SupportedInitialize Drive Parameters 91h Idle Immediate 95h or E1hNOP 00h Read DMA C8h Read Long Sector 22h or 23h Read Buffer E4hTS1G~32GCF133 Seek 7Xh Feature Supported Set Features EFh133X CompactFlash Card TS1G~32GCF133 Translate Sector Information Standby Immediate 94h or E0h Translate Sector 87hWear Level F5h Write Buffer E8h Write DMA CAh TS1G~32GCF133 TS1G~32GCF133 Error Posting Smart Command Set Smart Feature Register Values Smart Command SetDecription Smart Data Structure