Xilinx Understanding Aardvark Total Phase Integration with ML403 FPGA Board
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ML403 Board Information

Figure 14 shows the FPGA pins driving the IIC Bus.

R

IO_L8N_GC_LC_3_C12 IO_L8P_GC_LC_3_C13 IO_L7N_GC_LC_3_A17 IO_L7P_GC_LC_3_B17 IO_L6N_GC_LC_3_B10 IO_L6P_GC_LC_3_A10 IO_L5N_GC_LC_3_A15 IO_L5P_GC_LC_3_A16

IO_L4N_GC_VREF_LC_3_B12 IO_L4P_GC_LC_3_B13 IO_L3N_GC_LC_3_C14 IO_L3P_GC_LC_3_C15 IO_L2N_GC_VRP_LC_3_A11 IO_L2P_GC_VRN_LC_3_A12 IO_L1P_GC_CC_LC_3_B14 IO_L1P_GC_CC_LC_3_B15

FPGA_BANK3 2.5 VCC0

C12 SMA_DIFF_CLK_IN_N

C13 SMA_DIFF_CLK_IN_P

A17 IIC_SCL

B17 IIC_SDA

B10 DDR_CLK1_N

A10 DDR_CLK1_P

A15 DDR_A13

A16 DDR_BA1

B12 DDR_BA0

B13 DDR_CLK_P

C14 MOUSE_DATA

C15 PHY_TXCLK

A11 GPIO_LED_2

A12 GPIO_LED_3

B14 MOUSE_CLK

B15 PHY_RXC_RXCLK

X979_14_012907

Figure 14: FPGA IIC Pins

TotalPhase Aardvark Adapter

In the reference design, the OPB IIC in the XC4VFX12 on the ML403 board interfaces to the IIC in the Aardvark Adapter. The Aardvark IIC/SPI Embedded Systems interface is a multi- functional host adapter. The Aardvark Control Center software interacts with the Aardvark Adapter. The Control Center controls the functionality of the Aardvark Adapter. It uses the Aardvark IIC/SPI Software API. the Aardvark Adapter has six functional modes. The IIC-related modes are the IIC + SPI and IIC Bus Monitoring modes.

The Aardvark must be configured for use before the Aardvark Control Center software can be used to send and receive messages. Configuring the Aardvark Adapter binds the instance of the application with the available unit until the adapter is disconnected or the application is terminated.

The Configure Aardvark Adapter window is organized into two major sections: list of available adapters connected to the computer and list of the six operational modes. The main application window is divided into two sections. The top section contains the modules used with the Aardvark Adapter. The bottom section contains the transaction log which tracks all transactions that the Aardvark sends or receives. The transaction log contains the time, read or write transaction, master or slave, bit rate, address, number of bytes, and data.

XAPP979 (v1.0) February 26, 2007

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Contents Summary Included SystemsIntroduction IIC PrimerIntroduction Data Transfer on the IIC Bus Reference System Specifics Reference System SpecificsML403 XC4VFX12 Address Map OPB IIC RegistersOPB IIC Registers Address OPB IIC Control Register Bits Name DescriptionStatus Register SR Status Register Bit Definitions Contd Configuring the OPB IIC Core Microchip 24LC04ML40x Schematic for IIC Connections 24LC04 Control Byte AllocationML40x Resistors Expansion Header TotalPhase Aardvark Adapter Fpga IIC PinsAardvark Control Center Executing the Reference System from EDK Software ProjectsProjects interfacing to Aardvark Adapter Running the Applications Running the ApplicationsProject HyperTerminal Parameters Using ChipScope with OPB IIC Invoke XPS. Run Hardware → Generate NetlistRun Start → Programs → ChipScope Pro → ChipScope Inserter Making Net Connections in ChipScope Inserter Start → Programs → ChipScope Pro → ChipScope Pro AnalyzerSetting Up the Chipscope Trigger Linux Kernel Linux KernelBSP Settings Connected Peripherals Simulation SimulationSignal Name Functionality OPB IIC SimulationComplete Simulation Arbitrartion Lost Test Simulation Arbitration Lost Test Code Simulation with iicAA as Master Test code with iicAA as Master X97934012907 Test Code for Simulation with iic20 as Master Revision HistoryReferences Revision
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