Xilinx ML403 specifications Making Net Connections in ChipScope Inserter

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Using ChipScope with OPB IIC

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5.Figure 23 shows the GUI for making net connections. Click Next to move to the Modify Connections window. If there are any red data or trigger signals, correct them. The Filter Pattern can be used to find net(s). As an example of using the Filter Pattern, enter intr in the dialog box to locate interrupt signals. In the Net Selections area, select either Clock, Trigger, or Data Signals. Select the net and click Make Connections.

X979_23_012907

Figure 23: Making Net Connections in ChipScope Inserter

7. Click Insert Core to insert the core into iic_eeprom_wrapper.ngo. In the

ml403_ppc_opb_IIC/implementation directory, copy iic_eeprom_wrapper.ngo to iic_eeprom_wrapper.ngc.

8.In XPS, run Hardware → Generate Bitstream and Device Configuration → Download Bitstream. Do not rerun Hardware → Generate Netlist, as this overwrites the implementation/iic_eeprom_wrapper.ngc produced by the step above. Verify that the file size of the opb_iic_wrapper.ngc with the inserted core is significantly larger than the original version.

9.Invoke ChipScope Pro Core Analyzer by selecting

Start → Programs → ChipScope Pro → ChipScope Pro Analyzer

Click on the JTAG chain icon located at the top left of Analyzer GUI. Verify that the message in the transcript window indicates that an ChipScope ICON is found.

10.The ChipScope Analyzer waveform viewer displays signals named DATA*. To replace the DATA* signal names with the signal names specified in ChipScope Inserter, select File → Import and enter iic.cdc in the dialog box.

XAPP979 (v1.0) February 26, 2007

www.xilinx.com

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Contents Included Systems SummaryIIC Primer IntroductionIntroduction Data Transfer on the IIC Bus Reference System Specifics Reference System SpecificsOPB IIC Control Register Bits Name Description ML403 XC4VFX12 Address MapOPB IIC Registers OPB IIC Registers AddressStatus Register SR Status Register Bit Definitions Contd Microchip 24LC04 Configuring the OPB IIC Core24LC04 Control Byte Allocation ML40x Schematic for IIC ConnectionsML40x Resistors Expansion Header Fpga IIC Pins TotalPhase Aardvark AdapterAardvark Control Center Software Projects Executing the Reference System from EDKProjects interfacing to Aardvark Adapter Running the Applications Running the ApplicationsProject HyperTerminal Parameters Invoke XPS. Run Hardware → Generate Netlist Using ChipScope with OPB IICRun Start → Programs → ChipScope Pro → ChipScope Inserter Start → Programs → ChipScope Pro → ChipScope Pro Analyzer Making Net Connections in ChipScope InserterSetting Up the Chipscope Trigger Linux Kernel Linux KernelBSP Settings Connected Peripherals Simulation SimulationOPB IIC Simulation Signal Name FunctionalityComplete Simulation Arbitrartion Lost Test Simulation Arbitration Lost Test Code Simulation with iicAA as Master Test code with iicAA as Master X97934012907 Test Code for Simulation with iic20 as Master Revision RevisionHistory References
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