Xilinx ML403 specifications Revision, History, References

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References

References	DS434 OPB IIC Bus Interface (v1.02a)
	XAPP765 Getting Started with EDK and MontaVista Linux
	ML40x Embedded Development Platform User Guide UG080 (v2.5) May 24, 2006
	ChipScope ILA Tools Tutorial
	The IIC Bus Speciﬁcation Version 2.1 January 2000 Philips Semiconductors

Revision	The following table shows the revision history for this document.
History		Date		Version		Revision
History

		2/26/07		1.0		Initial Xilinx release.

R

XAPP979 (v1.0) February 26, 2007

www.xilinx.com

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Contents Included Systems SummaryIntroduction IIC PrimerIntroduction Data Transfer on the IIC Bus Reference System Speciﬁcs Reference System SpeciﬁcsOPB IIC Registers ML403 XC4VFX12 Address MapOPB IIC Registers Address OPB IIC Control Register Bits Name DescriptionStatus Register SR Status Register Bit Deﬁnitions Contd Microchip 24LC04 Conﬁguring the OPB IIC Core24LC04 Control Byte Allocation ML40x Schematic for IIC ConnectionsML40x Resistors Expansion Header Fpga IIC Pins TotalPhase Aardvark AdapterAardvark Control Center Software Projects Executing the Reference System from EDKProjects interfacing to Aardvark Adapter Running the Applications Running the ApplicationsProject HyperTerminal Parameters Using ChipScope with OPB IIC Invoke XPS. Run Hardware → Generate NetlistRun Start → Programs → ChipScope Pro → ChipScope Inserter Start → Programs → ChipScope Pro → ChipScope Pro Analyzer Making Net Connections in ChipScope InserterSetting Up the Chipscope Trigger Linux Kernel Linux KernelBSP Settings Connected Peripherals Simulation SimulationOPB IIC Simulation Signal Name FunctionalityComplete Simulation Arbitrartion Lost Test Simulation Arbitration Lost Test Code Simulation with iicAA as Master Test code with iicAA as Master X97934012907 Test Code for Simulation with iic20 as Master History RevisionReferences Revision