Siemens SPC3 manual Processor Parameters Latches/Register

Page 15

 

 

SPC3

PROFIBUS Interface Center

 

 

 

 

 

 

4.2 Processor Parameters (Latches/Register)

These cells can be either read only or written only. SPC3 carries out “address swapping” for an access to the address area 00H - 07H (word register) in the Motorola mode. That is, the SPC3 exchanges

address bit 0 (generated from an even address, one uneven, and vice-versa). The following sections more clearly explain the significance of the individual registers.

Address

Name

Bit

Significance (Read Access!)

Intel

/ Motorla

No.

 

 

 

 

 

 

 

 

00H

 

01H

Int-Req-Reg

 

Interrupt Controller Register

 

 

 

7..0

 

 

01H

 

00H

Int-Req-Reg

 

 

 

 

 

15..8

 

 

02H

 

03H

Int—Reg

 

 

 

 

 

7..0

 

 

03H

 

02H

Int—Reg

 

 

 

 

 

15..8

 

 

04H

 

05H

Status-Reg

 

Status Register

 

 

 

7..0

 

 

05H

 

04H

Status-Reg

 

 

 

 

 

15..8

 

 

06H

 

07H

Reserved

 

 

07H

 

06H

 

 

 

 

08H

DIN_Buffer_SM

 

Buffer assignment of the

 

 

 

7..0

 

DP_Din_Buffer_State_Machine

 

09H

New_DIN_Buffer_Cmd

 

The user makes a new DP Din buffer available in

 

 

 

1..0

 

the N state.

0AH

DOUT_Buffer_SM

 

Buffer assignment of the

 

 

 

7..0

 

DP_Dout_Puffer_State_Machine

0BH

Next_DOUT_Buffer_Cmd

 

The user fetches the last DP Dout-Buffer from the N

 

 

 

1..0

 

state.

0CH

DIAG_Buffer_SM

 

Buffer assignment for the

 

 

 

3..0

 

DP_Diag_Puffer_State_Machine

0DH

New_DIAG_Puffer_Cmd

 

The user makes a new DP Diag Buffer available to

 

 

 

1..0

 

the SPC3.

0EH

User_Prm_Data_OK

 

The user positively acknowledges the user

 

 

 

1..0

 

parameter setting data of a Set_Param-Telegram.

 

0FH

UserPrmDataNOK

 

The user negatively acknowledges the user

 

 

 

1..0

 

parameter setting data of a Set_Param-Telegram.

 

10H

User_Cfg_Data_OK

 

The user positively acknowledges the configuration

 

 

 

1..0

 

data of a Check_Config-Telegram.

 

11H

User_Cfg_Data_NOK

1..0

The user negatively acknowledges the configuration

 

 

 

 

 

data of a Check_Config-Telegram.

 

12H

Reserved

 

 

 

13H

 

 

 

 

14H

SSA_Bufferfreecmd

 

The user has fetched the data from the SSA buffer

 

 

 

 

 

and enables the buffer again.

 

15H

Reserved

 

 

Figure 4.2: Assignment of the Internal Parameter Latches for READ

SPC3 Hardware Description

V1.3

Page 13

Copyright (C) Siemens AG 2003 All rights reserved.

 

2003/04

Image 15 Contents
Simatic NET Page SIM Atic NET SPC3 Hardware Description Profibus Interface CenterRelease Date Changes VersionsDirectory Mode RegisterStatus Register Interrupt Controller Watchdog Timer DPBuffer Structure Description of the DP Services11.3 Diagnostics Processing from the System View Asic TestPin Assignment Example for the RS 485 Interface SPC3 Introduction Function Overview Cmos Pin DescriptionCPD Cmos with pull down TTLt Schmitt trigger V1.3 Memory Allocation Memory Area Distribution in the SPC35FFH Segment Processor Parameters Latches/Register Significance Write Access OCH 0DH0EH 0FH Organizational Parameters RAM 1DH 1AH1BH 1CHAsic Interface Mode RegisterDisstartcontrol EOI Mode Register 1 Mode-REG1, writableSTARTSPC3 Exiting the Offline stateStatus Register Status Register Bit15 . .readable FdlindstSPC3 IRR IMR Interrupt ControllerDxout IAR IMRResponse Time Monitoring Watchdog TimerAutomatic Baud Rate Identification Baud Rate MonitoringDPBuffer Structure PROFIBUS-DP InterfaceUart Aux-Buffer Management RAMDescription of the DP Services SetSlaveAddress SAP55Sequence for the SetSlaveAddress Utility SetParam SAP61 Parameter Data StructureParameter Data Processing Sequence SPC3 CheckConfig SAP62Diagnostics Processing Sequence SlaveDiagnosis SAP60SPC3 Structure of the Diagnostics Buffer WriteReadData / DataExchange DefaultSAPWriting Outputs Reading Inputs GlobalControl SAP58 UserWatchdogTimerGetConfig SAP59 ReadInputs SAP56ReadOutputs SAP57 Bus Interface Unit BIU Hardware InterfaceUniversal Processor Bus Interface General DescriptionBus Interface V1.3 XINT/MO ModeLow Cost System with 80C32 Switching Diagram PrinciplesSystem X86-Mode Application with the 80 C SPC3Application with th 80 C Interface Signals UartAsic Test DC-Specifikation of the I/O- Drivers Technical DataMaximum Limit Values Permitted Operating ValuesAC-Specification for the Output Drivers Tabel 8.3 DC-Specifikation of the I/O- DriversCurrent Tabelle 8.5 Leakage current of the output drivers Clock Pulse Timing Timing CharacteristicsSYS Bus Interface Clock pulse 48 MhzTBD ResetTiming in the Synchronous C32-Mode ST-Vers Min Max UnitSynchronous Intel-Mode, Processor-Write-Timing Synchronous Intel-Mode, Processor-Read-TimingTiming in the Asynchronous Intel Mode X86 Mode ST-VersParameter Min Max XWR XCS Asynchronous Intel-Mode, Processor-Read-TimingXRD XCS Xready Asynchronous Intel-Mode, Processor-Write-TimingSynchronous Motorola-Mode, Processor-Read-Timing 4.1 74.2Timing in the Asynchronous Motorola-Mode for example, 68HC16 Synchronous Motorola-Mode, Processor-Write-TimingAsynchronous Motorola-Mode, Processor-Read-Timing XCS XdsackAsynchronous Motorola-Mode, Processor-Write-Timing Pulse 48 MHz Serial Bus InterfaceHousing PQFP-44 Housing SPC3 Hardware Description 14.15 Symbol Min Typ Max AMI-Vers13.65 13.90TXD Profibus InterfacePin Assignment RTSSN65ALS1176 Example for the RS 485 InterfaceTechnical contact person at ComDeC in Germany AppendixAddresses Profibus User Organisation10.3.2 SPC3 ST General Definition of TermsOrdering of ASICs 10.3.1 SPC3 AMIStatdiag Appendix a Diagnostics Processing in Profibus DPDiagnostics Bits and Expanded Diagnostics IntroductionIdentifier Byte 7 has Etc Identifier Byte 0 has Combi Diagnostics Processing from the System ViewSingle Diagnostics Simatic S5 / COM ETData format in the Siemens PLC Simatic Appendix B Useful InformationPage Siemens Aktiengesellschaft