Siemens SPC3 manual CheckConfig SAP62

Page 33

 

 

 

 

 

 

 

 

 

 

SPC3

 

PROFIBUS Interface Center

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Address

 

 

 

Bit Position

 

 

 

 

 

Designation

 

 

Control

7

6

5

4

3

2

 

1

 

0

 

 

 

Register

 

 

 

 

 

 

 

 

 

 

 

 

 

0EH

0

0

0

0

0

0

 

￿

 

￿

User_Prm_Data_Okay

 

 

 

 

 

 

 

 

 

 

 

 

0

 

0

User_Prm_Finished

 

 

 

 

 

 

 

 

 

 

 

 

0

 

1

PRM_Conflict

 

 

 

 

 

 

 

 

 

 

 

 

1

 

1

Not_Allowed

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Address

 

 

 

Bit Position

 

 

 

 

 

Designation

 

 

Control

7

6

5

4

3

2

 

1

 

0

 

 

 

Register

 

 

 

 

 

 

 

 

 

 

 

 

 

0FH

0

0

0

0

0

0

 

￿

 

￿

User_Prm_Data_Not_Okay

 

 

 

 

 

 

 

 

 

 

 

 

0

 

0

User_Prm_Finished

 

 

 

 

 

 

 

 

 

 

 

 

0

 

1

PRM_Conflict

 

 

 

 

 

 

 

 

 

 

 

 

1

 

1

Not_Allowed

 

Figure 6.6: Coding User_Prm_Data_Not/_Okay_Cmd

If an additional Set-Param telegram is supposed to be received in the meantime, the signal ‘Prm_Conflict’ is is returned for the acknowledgement of the first Set_Param telegram, whether positive or negative. Then the user must repeat the validation because the SPC3 has made a new Prm buffer available.

6.2.3 Check_Config (SAP62)

The user takes on the evaluation of the configuration data. After SPC3 has received a validated Check_Config-Telegram, SPC3 exchanges the Aux-Puffer1/2 (all data bytes are entered here) for the Cfg

buffer, stores the input data length in ‘R_Len_CfgData,’- and generates ‘New_Cfg_Data-Interrupt’.

The user must then check the ‘User_Config_Data’ andeither respond with ‘User_Cfg_Data_Okay_Cmd’ or with ‘User_Cfg_Data_Not_Okay_Cmd’ (acknowledgement to the Cfg_SM). The net data is input in the buffer in the format regulation of the standard.

The user response (User_Cfg_Data_Okay_Cmd or the User_Cfg_Data_Not_Okay_Cmd response) again takes back the ‘New_Cfg_Data’ interrupt and may not be acknowledged in the IAR.

If an incorrect configuration is signalled back, various diagnostics bits are changed, and there is branching to ‘Wait_Prm.“

For a correct configuration, the transition to ‘DATA_EX’ takes place immediately, if no Din_buffer is present (R_Len_Din_Puf = 00H) and trigger counters for the parameter setting telegrams and configuration telegrams are at 0. Otherwise, the transition does not take place until the first ‘New_DIN_Puffer_Cmd’ with which the user makes the first valid ‘N buffer” available. When entering into ‘DATA_EX,’ SPC3 also generates the ‘Go/Leave_Data_Exchange-Interrupt.

If the received configuration data from the Cfg buffer are supposed to result in a change of the Read-Cfg- buffer ( the change contains the data for the Get_Config telegram), the user must make the new Read_Cfg data available in the Read-Cfg buffer before the ‘User_Cfg_Data_Okay_Cmd” acknowledgement. After receiving the acknowledgement, SPC3 exchanges the Cfg buffer with the Read-Cfg buffer, if ‘EN_Change_Cfg_buffer = 1’ is set in mode register1.

During the acknowledgement, the user receives information about whether there is a conflict or not. If an additional Check_Config telegram was supposed to be received in the meantime, the user receives the ‘Cfg_Conflict” signal during the acknowledgement of the first Check_Config telegram, whether positive or negative. Then the user must repeat the validation, because SPC3 has made a new Cfg buffer available.

The ‘User_Cfg_Data_Okay_Cmd’ and ‘User_Cfg_Data_NotOkay_Cmd’ acknowledgements are read accesses to defined memory cells (see Section 2.2.1) with the relevant ‘Not_Allowed’, ‘User_Cfg_Finished,’ or ‘Cfg_Conflict’ signals (see Figure 3.7). If the ‘New_Prm_Data’and ‘New_Cfg_Data’ are supposed to be present simultaneously during power up, the user must maintain the Set_Param and then the Check_Config. acknowledgement sequence.

SPC3 Hardware Description

V1.3

Page 31

Copyright (C) Siemens AG 2003 All rights reserved.

 

2003/04

Image 33 Contents
Simatic NET Page SIM Atic NET SPC3 Hardware Description Profibus Interface CenterRelease Date Changes VersionsStatus Register Interrupt Controller Watchdog Timer Mode RegisterDPBuffer Structure Description of the DP Services Directory11.3 Diagnostics Processing from the System View Asic TestPin Assignment Example for the RS 485 Interface SPC3 Introduction Function Overview Cmos Pin DescriptionCPD Cmos with pull down TTLt Schmitt trigger V1.3 Memory Allocation Memory Area Distribution in the SPC35FFH Segment Processor Parameters Latches/Register Significance Write Access OCH 0DH0EH 0FH Organizational Parameters RAM 1BH 1AH1CH 1DHAsic Interface Mode RegisterDisstartcontrol STARTSPC3 Mode Register 1 Mode-REG1, writableExiting the Offline state EOIStatus Register Status Register Bit15 . .readable FdlindstSPC3 IRR IMR Interrupt ControllerDxout IAR IMRAutomatic Baud Rate Identification Watchdog TimerBaud Rate Monitoring Response Time MonitoringDPBuffer Structure PROFIBUS-DP Interface Uart Aux-Buffer Management RAMDescription of the DP Services SetSlaveAddress SAP55Sequence for the SetSlaveAddress Utility SetParam SAP61 Parameter Data StructureParameter Data Processing Sequence SPC3 CheckConfig SAP62Diagnostics Processing Sequence SlaveDiagnosis SAP60SPC3 Structure of the Diagnostics Buffer WriteReadData / DataExchange DefaultSAPWriting Outputs Reading Inputs GlobalControl SAP58 UserWatchdogTimerGetConfig SAP59 ReadInputs SAP56ReadOutputs SAP57 Universal Processor Bus Interface Hardware InterfaceGeneral Description Bus Interface Unit BIUBus Interface V1.3 XINT/MO ModeLow Cost System with 80C32 Switching Diagram PrinciplesSystem X86-Mode Application with the 80 C SPC3Application with th 80 C Interface Signals UartAsic Test Maximum Limit Values Technical DataPermitted Operating Values DC-Specifikation of the I/O- DriversAC-Specification for the Output Drivers Tabel 8.3 DC-Specifikation of the I/O- DriversCurrent Tabelle 8.5 Leakage current of the output drivers SYS Bus Interface Timing CharacteristicsClock pulse 48 Mhz Clock Pulse TimingTiming in the Synchronous C32-Mode ResetST-Vers Min Max Unit TBDSynchronous Intel-Mode, Processor-Write-Timing Synchronous Intel-Mode, Processor-Read-TimingTiming in the Asynchronous Intel Mode X86 Mode ST-VersParameter Min Max XRD XCS Xready Asynchronous Intel-Mode, Processor-Read-TimingAsynchronous Intel-Mode, Processor-Write-Timing XWR XCSSynchronous Motorola-Mode, Processor-Read-Timing 4.1 74.2Timing in the Asynchronous Motorola-Mode for example, 68HC16 Synchronous Motorola-Mode, Processor-Write-TimingAsynchronous Motorola-Mode, Processor-Read-Timing XCS XdsackAsynchronous Motorola-Mode, Processor-Write-Timing Pulse 48 MHz Serial Bus InterfaceHousing PQFP-44 Housing SPC3 Hardware Description 13.65 Symbol Min Typ Max AMI-Vers13.90 14.15Pin Assignment Profibus InterfaceRTS TXDSN65ALS1176 Example for the RS 485 InterfaceAddresses AppendixProfibus User Organisation Technical contact person at ComDeC in GermanyOrdering of ASICs General Definition of Terms10.3.1 SPC3 AMI 10.3.2 SPC3 STDiagnostics Bits and Expanded Diagnostics Appendix a Diagnostics Processing in Profibus DPIntroduction StatdiagIdentifier Byte 7 has Etc Identifier Byte 0 has Single Diagnostics Diagnostics Processing from the System ViewSimatic S5 / COM ET CombiData format in the Siemens PLC Simatic Appendix B Useful InformationPage Siemens Aktiengesellschaft