Siemens SPC3 manual Disstartcontrol

Page 20

 

PROFIBUS Interface Center

SPC3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bit 0

DIS_START_CONTROL

 

 

 

 

 

 

Monitoring the following start bit in UART. Set-Param Telegram overwrites this memory cell in

 

 

 

the DP mode. (Refer to the user-specific data.)

 

 

 

0 =

Monitoring the following start bit is enabled.

 

 

 

1 =

Monitoring the following start bit is switched off.

 

 

Bit 1

DIS_STOP_CONTROL

 

 

 

 

 

 

Stop bit monitoring in UART. Set-Param telegram overwrites this memory cell in the DP mode.

 

 

 

(Refer to the user-specific data.)

 

 

 

 

 

 

0 =

Stop bit monitoring is enabled.

 

 

 

 

 

 

1 =

Stop bit monitoring is switched off.

 

 

 

 

 

Bit 2

EN_FDL_DDB

 

 

 

 

 

 

 

Reserved

 

 

 

 

 

 

 

0 =

The FDL_DDB receive is disabled.

 

 

 

 

 

Bit 3

MinTSDR

 

 

 

 

 

 

 

Default setting for the MinTSDR after reset for DP operation or combi operation

 

 

 

0 =

Pure DP operation (default configuration!)

 

 

 

1 =

Combi operation

 

 

 

 

 

Bit 4

INT_POL

 

 

 

 

 

 

 

Polarity of the interrupt output

 

 

 

 

 

 

0 =

The interrupt output is low-active.

 

 

 

 

 

 

1 =

The interrupt output is high-active.

 

 

 

 

 

Bit 5

EARLY_RDY

 

 

 

 

 

 

 

Moved up ready signal

 

 

 

 

 

 

0 =

Ready is generated when the data are valid (read) or when the data are accepted

 

 

 

 

(write).

 

 

 

 

 

 

1 =

Ready is moved up by one clock pulse.

 

 

Bit 6

Sync_Supported

 

 

 

 

 

 

 

Sync_Mode support

 

 

 

 

 

 

0 =

Sync_Mode is not supported.

 

 

 

 

 

 

1 =

Sync_Mode is supported.

 

 

 

 

 

Bit 7

Freeze_Supported

 

 

 

 

 

 

Freeze_Mode support

 

 

 

 

 

 

0 =

Freeze_Mode is not supported.

 

 

 

 

 

 

1 =

Freeze_Mode is supported.

 

 

 

 

 

Bit 8

DP_MODE

 

 

 

 

 

 

 

DP_Mode enable

 

 

 

 

 

 

0 =

DP_Mode is disabled.

 

 

 

 

 

 

1 =

DP_Mode is enabled. SPC3 sets up all DP_SAPs.

 

 

Bit 9

EOI_Time base

 

 

 

 

 

 

 

Time base for the end of interrupt pulse

 

 

 

 

 

 

0 =

The interrupt inactive time is at least 1 usec long.

 

 

 

1 =

The interrupt inactive time is at least 1 ms long.

 

 

Bit 10

User_Time base

 

 

 

 

 

 

 

Time base for the cyclical User_Time_Clock-Interrupt

 

 

 

0 =

The User_Time_Clock-Interrupt occurs every 1 ms.

 

 

 

1 =

The User_Time_Clock-Interrupt occurs every 10 ms.

 

 

Bit 11

WD_Test

 

 

 

 

 

 

 

Test mode for the Watchdog-Timer, no function mode

 

 

 

0 =

The WD runs in the function mode.

 

 

 

1 =

Not permitted

 

 

 

 

 

Bit 12

Spec_Prm_Puf_Mode

 

 

 

 

 

 

Special parameter buffer

 

 

 

 

 

 

0 =

No special parameter buffer.

 

 

 

 

 

 

1 =

Special parameter buffer mode .Parameterization data will be stored directly in the

 

 

 

 

special parameter buffer.

 

 

 

 

 

Bit 13

Spec_Clear_Mode

 

 

 

 

 

 

Special Clear Mode (Fail Safe Mode)

 

 

 

 

 

 

0 =

No special clear mode.

 

 

 

 

 

 

1 =

Special clear mode. SPC3 will accept datea telegramms with data unit = 0.

 

Figure 5.1: Mode-Register 0 Bit 12 .. 0.(can be written to, can be changed in offline only)

Page 18

V1.3

SPC3 Hardware Description

2003/04

 

Copyright (C) Siemens AG 2003. All rights reserved.

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Contents
Simatic NET Page SIM Atic NET Profibus Interface Center SPC3 Hardware DescriptionVersions Release Date ChangesMode Register Status Register Interrupt Controller Watchdog TimerDPBuffer Structure Description of the DP Services DirectoryPin Assignment Example for the RS 485 Interface 11.3 Diagnostics Processing from the System ViewAsic Test SPC3 Introduction Function Overview Pin Description CmosCPD Cmos with pull down TTLt Schmitt trigger V1.3 5FFH Memory AllocationMemory Area Distribution in the SPC3 Segment Processor Parameters Latches/Register 0EH 0FH Significance Write Access OCH 0DH Organizational Parameters RAM 1AH 1BH1CH 1DHMode Register Asic InterfaceDisstartcontrol Mode Register 1 Mode-REG1, writable STARTSPC3Exiting the Offline state EOIStatus Register Fdlindst Status Register Bit15 . .readableInterrupt Controller SPC3 IRR IMRDxout IMR IARWatchdog Timer Automatic Baud Rate IdentificationBaud Rate Monitoring Response Time MonitoringPROFIBUS-DP Interface DPBuffer StructureUart RAM Aux-Buffer ManagementSequence for the SetSlaveAddress Utility Description of the DP ServicesSetSlaveAddress SAP55 Parameter Data Processing Sequence SetParam SAP61Parameter Data Structure CheckConfig SAP62 SPC3SPC3 Diagnostics Processing SequenceSlaveDiagnosis SAP60 Writing Outputs Structure of the Diagnostics BufferWriteReadData / DataExchange DefaultSAP Reading Inputs UserWatchdogTimer GlobalControl SAP58ReadOutputs SAP57 GetConfig SAP59ReadInputs SAP56 Hardware Interface Universal Processor Bus InterfaceGeneral Description Bus Interface Unit BIUXINT/MO Mode Bus Interface V1.3Switching Diagram Principles Low Cost System with 80C32System X86-Mode SPC3 Application with the 80 CApplication with th 80 C Asic Test Interface SignalsUart Technical Data Maximum Limit ValuesPermitted Operating Values DC-Specifikation of the I/O- DriversCurrent Tabelle 8.5 Leakage current of the output drivers AC-Specification for the Output DriversTabel 8.3 DC-Specifikation of the I/O- Drivers Timing Characteristics SYS Bus InterfaceClock pulse 48 Mhz Clock Pulse TimingReset Timing in the Synchronous C32-ModeST-Vers Min Max Unit TBDSynchronous Intel-Mode, Processor-Read-Timing Synchronous Intel-Mode, Processor-Write-TimingParameter Min Max Timing in the Asynchronous Intel Mode X86 ModeST-Vers Asynchronous Intel-Mode, Processor-Read-Timing XRD XCS XreadyAsynchronous Intel-Mode, Processor-Write-Timing XWR XCS4.1 74.2 Synchronous Motorola-Mode, Processor-Read-TimingSynchronous Motorola-Mode, Processor-Write-Timing Timing in the Asynchronous Motorola-Mode for example, 68HC16Asynchronous Motorola-Mode, Processor-Write-Timing Asynchronous Motorola-Mode, Processor-Read-TimingXCS Xdsack Serial Bus Interface Pulse 48 MHzHousing PQFP-44 Housing SPC3 Hardware Description Symbol Min Typ Max AMI-Vers 13.6513.90 14.15Profibus Interface Pin AssignmentRTS TXDExample for the RS 485 Interface SN65ALS1176Appendix AddressesProfibus User Organisation Technical contact person at ComDeC in GermanyGeneral Definition of Terms Ordering of ASICs10.3.1 SPC3 AMI 10.3.2 SPC3 STAppendix a Diagnostics Processing in Profibus DP Diagnostics Bits and Expanded DiagnosticsIntroduction StatdiagIdentifier Byte 7 has Etc Identifier Byte 0 has Diagnostics Processing from the System View Single DiagnosticsSimatic S5 / COM ET CombiAppendix B Useful Information Data format in the Siemens PLC SimaticPage Siemens Aktiengesellschaft
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