Maxim MAX12527 manual Grounding, Bypassing, and Board Layout

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	Dual, 65Msps, 12-Bit, IF/Baseband ADC
MAX12527	3.3V
	0.1µF		3V						0.1µF	2.2µF
		1							0.1µF	2.2µF
		1	5
			5
			20kΩ					REF_P	VDD
		MAX6029	1%					REF_P
		MAX6029					0.1µF		REFOUT
		(EUK30)					0.1µF		REFOUT
		(EUK30)								0.1µF
			20kΩ				10µF	0.1µF		0.1µF
			20kΩ				10µF	0.1µF
		2	1%			2.413V		MAX12527
		2		1				MAX12527
				1
				4	47Ω			REF_N
					47Ω			REF_N
							0.1µF
				MAX4230			0.1µF
				MAX4230
		0.47µF		3		330µF
		0.47µF		10µF		330µF
				6V	1.47kΩ	6V
			52.3kΩ		1.47kΩ			COM_	REFIN
			52.3kΩ					COM_	REFIN
			1%				0.1µF		GND
						1.647V	0.1µF
				1		1.647V
				4	47Ω
				4
				MAX4230				3.3V
				3		330µF
				10µF		330µF
			52.3kΩ	6V	1.47kΩ	6V
			52.3kΩ
			1%						0.1µF	2.2µF
			1%

				1		0.880V			VDD
				4	47Ω			REF_P	VDD
					47Ω			REF_P
			20kΩ				0.1µF		REFOUT
			20kΩ	MAX4230			0.1µF		REFOUT
			1%	3						0.1µF
				10µF		330µF	10µF	0.1µF		0.1µF
				10µF		330µF
				6V		6V
				6V	1.47kΩ	6V		MAX12527
			20kΩ					MAX12527


			1%					REF_N
							0.1µF
			20kΩ
			1%
								COM_	REFIN
							0.1µF		GND
							0.1µF

Figure 13. External Unbuffered Reference Driving Multiple ADCs

ence, allowing REF_P, REF_N, and COM_ to be driven directly by a set of external reference sources.

Figure 13 uses a MAX6029 precision 3.000V bandgap reference as a common reference for multiple convert- ers. A seven-component resistive divider chain follows the MAX6029 voltage reference. The 0.47µF capacitor along this chain creates a 10Hz LP filter. Three MAX4230 amplifiers buffer taps along this resistor chain providing 2.413V, 1.647V, and 0.880V to the MAX12527 REF_P, REF_N, and COM_ reference inputs. The feedback around the MAX4230 op amps provides additional 10Hz LP filtering. Reference volt- ages 2.413V and 0.880V set the full-scale analog input

range for the converter to ±1.022V (±[VREF_P - VREF_N] x 2/3).

Note that one single power supply for all active circuit components removes any concern regarding power- supply sequencing when powering up or down.

Grounding, Bypassing, and Board Layout

The MAX12527 requires high-speed board layout design techniques. Refer to the MAX12557 EV kit data sheet for a board layout reference. Locate all bypass capacitors as close to the device as possible, prefer- ably on the same side as the ADC, using surface-

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Contents Features General DescriptionApplications Ordering InformationParameter Symbol Conditions MIN TYP MAX Units DC Accuracy Dynamic Characteristics differential inputsAnalog Input INAP, INAN, INBP, Inbn Conversion RateParameter Symbol Conditions MIN TYP MAX Units Interchannel Characteristics Internal Reference RefoutVcom Parameter Symbol Conditions MIN TYP Clock Inputs CLKP, ClknDigital Inputs DIFFCLK/ SECLK, G/ T, PD, DIV2, DIV4 Digital Outputs D0A-D11A, D0B-D11B, DORA, DORB, DAVPower Requirements D0A-D11A, DoraOvdd DIFFCLK/SECLK = GNDTypical Operating Characteristics Timing Characteristics FigureFFT Plot 16,384-POINT Data Record FFT Plot 32,768-POINT Data RecordMAX12527 THD, Sfdr vs. Clock Speed fIN = 70MHz, AIN = -0.5dBFS FCLK = 65.00352MHz, fIN = 175MHz FIN = 70MHz, AIN = -0.5dBFSTHD, Sfdr vs. Clock Duty Cycle FIN = 70MHz, AIN = -0.5dBFS SNR, Sinad vs. Temperature fIN = 175MHz, AIN = -0.5dBFS Pin Description PIN Name FunctionSame side of the PC board D0B D1BD2B D3BDetailed Description ShrefRefout RefinFunctional Diagram Reference Configurations Reference ModeAnalog Inputs and Input Track-and-Hold T/H Amplifier Reference OutputClock Duty-Cycle Equalizer Clock Input and Clock Control LinesSystem Timing Requirements DIV4 DIV2 FunctionEquivalent Binary D11A-D0ADOR D11A-D0A D11B-D0B CODE10Power-Down Input Vrefp VrefnBinary-to-Gray and Gray-to-Binary Code Conversion Using Transformer Coupling Single-Ended AC-Coupled Input SignalApplications Information Buffered External Reference Drives Multiple ADCs Unbuffered External Reference Drives Multiple ADCsGrounding, Bypassing, and Board Layout MAX12527Parameter Definitions Aperture Delay Full-Power BandwidthOverdrive Recovery Time Total Harmonic Distortion THDPin Configuration Gain MatchingOffset Matching Package Information 68L QFN THIN.EPS