AOC P/N : 41A50-144 Sync. Signal Support, Display Mode Support, Input Timing Measurement

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2.3.2 Sync. Signal Support

The gmZAN1 chip supports digital separate sync (Hsync/Vsync), digital composite sync, and analog composite sync (also known as sync-on-green). All sync types are supported without external sync separation / extraction circuits.

Digital Composite Sync

The types of digital composite sync inputs supported are:

zOR/AND type: No Csync pulses toggling during the vertical sync period

zXOR type: Csync polarity changes during the vertical sync period

The gmZan1 provides enough sync status information for the firmware to detect the digital composite sync type.

Sync-On-Green (Analog Composite Sync)

The voltage level of the sync tip during the vertical sync period can be either –0.3V or 0V

2.3.3 Display Mode Support

A mode calculation utility (MODECALC.EXE) provided by Genesis Microchip may be run before compilation of the firmware to determine which input modes can be supported. Refer to firmware documents for more details.

2.4 Input Timing Measurement

As described in section 2.2.2 above, input data is sent from the analog-to-digital converter to the source timing generator (STG) block. The STG block defines a capture window (Figure5).

The input timing measurement block consists of the source timing measurement (STM) block and interrupt request (IRQ) controller. Input timing parameters are measured by the STM block and stored in registers. Some input conditions will generate an IRQ to an external micro-controller. The IRQ generating conditions are programmable.

2.4.1 Source Timing Measurement

When it receives the active CRT signal (R,G,B and Sync signals) the Source Timing Measurement unit begins measuring the horizontal and vertical timing of the incoming signal using the sync signals and TCLKi as a reference. Horizontal measurement occurs by measuring a minimum and a maximum value for each parameter to account for TCLKi sampling granularity. The measured value is updated every line. Vertical parameters are measured in terms of horizontal lines. The trailing edge of the Hsync input is used to check the polarity of the Vsync input.

The table below lists all the parameters that may be read in the source timing measurement (STM) registers of the gmZAN1.

Table 11. Input Timing Parameters Measured by the STM Block

Parameter

Unit

Updated at:

HSYNC Missing

N/A

Every 4096 TCLKs and every 80ms (2-bits)

VSYNC Missing

N/A

Every 80ms

HSYNC/VSYNC Timing Change

N/A

When the horizontal period delta or the vertical

 

 

period delta to the previous line / frame exceeds the

 

 

threshold value (programmable).

HSYNC Polarity

Positive/Negative

After register read

VSYNC Polarity

Positive/Negative

Every frame

Horizontal Period Min/Max

TCLKs and SCLKs

After register read

HSYNC High Period Min/Max

TCLKs

After register read

Vertical Period

Lines

Every frame

VSYNC High Period

Lines

Every frame

Horizontal Display Start

SCLKs

Every frame

Horizontal Display End

SCLKs

Every frame

Vertical Display Start

Lines

Every frame

Vertical Display End

Lines

Every frame

Interlaced Input Detect

N/A

Every frame

CRC Data/Line Data

N/A

Every frame

CSYNC Detect

N/A

Every 80ms

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Contents Spectrum Series SEP Table of Contents General specifications Specifications for LCD MonitorLCD-PANEL Monitor Block Diagram Interface ConnectorsLCD Monitor Description AC-IN AdapterPrecautions and Notices Assembly PrecautionOperating Precautions Storage PrecautionsOperating Instructions PIN no Description REDAdjustment Conditions and Precautions AdjustmentAdjustment Method Adjust 6500 color-temperature Front Panel Control Knobs CIRCUIT-DESCRIPTION OSD-INDEX ExplanationInput not Support CHI-MEI Panel M170E1SIMPLE-INTRODUCTION about LM700 chipset MODULE-TPYE ComponentPanel Power-On Subrotine Chart Software Flow ChartSET factory mode flag Clear factory mode flagII. Main Subrotine Loop Interface-Board Trouble-Shooting chart No Screen AppearU200-DATA Output PANEL-POWER CircuitMainboard Check Oscillator Block as above Keyboard Block check POWER-BLOCK check END There is an interferences in DOS Mode Panel Luminance WAS DownInverter -MODULE Spec &Trouble Shooting Chart CorporationFunction Load Circuit M P O C O R P O R a T I O N Trouble Shooting of CHI-MEI Inverter DIVTL0037-D42 Part List Part Part Number QTY Description Supplier Remark Name Trouble Shooting Hight Voltage Protection Enbale Abnormality Transformer Abnormality Part number 80AL17-1-CH Black, 80AL17-2-CH White Check U101 PIN4NO Freq ~70KHZPage IV. Adapter BOM List Part no AL15-2-LI Reference Part Quantity Cat.NOPCB PCB for CH-1205 Revd PCS For Front Heatsink AUDIO-MODULE Trouble shooting chart No Voice OutputAudio BOM II. Sound DistortionGMZAN1 Pin Description Analog-to-Digital ConverterPIN # Name DescriptionHost Interface HIF / External On-Screen Display Clock Recovery / Time Base Conversion TFT Panel Interface PIN #Name Description 2pxl/clk 1pxl/clk TFTTest Pins System-level Block Diagram Typical Stand-alone ConfigurationOperating Modes NativeSlow Dclk ZoomDestination Stand Alone DownscalingSource Stand Alone Functional Description Clock Recovery CircuitOverall Architecture Clock Recovery Circuit Clock Recovery Characteristics Sampling Phase AdjustmentSource Timing Generator Minimum Typical MaximumADC Characteristics Analog-to-Digital Converter 2.3.1 Pin ConnectionPin Connection for RGB Input with Hsync/Vsync Pin Connection for RGB Input with Composite SyncSync. Signal Support Display Mode SupportInput Timing Measurement Source Timing MeasurementData Path IRQ ControllerIRQ-Generation Conditions IRQ Event Remark TFT Panel Interface Timing Specification Scaling FilterGamma Table RGB OffsetPclk *1 PCLKB*4Horizontal size in TFT Vsync width and display position in TFTHsync width in TFT Power Manager One pixel per clock mode in TFTState 0 Power Off State 1 Power OnState 2 Panel Drive Enabled State 3 Panel Fully ActivePanel Interface Drive Strength Host InterfacePanel Interface Pad Drive Strength Value 4 bits Drive Strength in mATiming Diagram of the gmZAN1 Serial Communication Serial Communication ProtocolMulti-Function Bus MFB GmZAN1 Serial Channel Specification Parameter Min Typ MaxOn-Screen Display Control OSD Color Map On-Chip OSD ControllerTclk Specification Tclk InputElectrical Characteristics DC Electrical Characteristic Parameter Min Typ MaxAbsolute Ratings Parameter Min Typ Max PvddMechanical of Cabinet Front DIS-ASSEMBLY Parts List of Cabinet T780KMGHBAA0A SpecificationParts List of Cabinet continue Parts List of Conversion Board Location CBPC780GM SpecificationLocation AI780GM Specification Location AI780GM SMD EC 22UF 16V 85C Csize Parts List of KEY PC Board KEPC780EKParts List of DC-POWER Board Parts List of Audio BoardAdapter Module Power System and Consumption CurrentInverter Module PCB Layout Schematic Diagram TOP-LEVEL FlowII. GMZAN1 Block Lvds Block MCU Block Power Block Adapter Schematic CH-1205 KBL405GC1,C2,C4 --- 1uF/50V

P/N : 41A50-144 specifications

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