SUPER MICRO Computer H8DMT Appendix B Bios Post Checkpoint Codes, Bootblock Recovery Codes

Page 57

Appendix B

BIOS POST Checkpoint Codes

B-1 Uncompressed Initialization Codes

The uncompressed initialization checkpoint codes are listed in order of execution:

Checkpoint

Code Description

D0h

The NMI is disabled. Power on delay is starting. Next, the initialization code

checksum will be verified.

 

D1h

Initializing the DMA controller, performing the keyboard controller BAT test,

starting memory refresh and entering 4 GB flat mode next.

 

D3h

Starting memory sizing next.

 

 

D4h

Returning to real mode. Executing any OEM patches and setting the Stack next.

 

Passing control to the uncompressed code in shadow RAM at E000:0000h. The

D5h

initialization code is copied to segment 0 and control will be transferred to

 

segment 0.

 

 

B-2 Bootblock Recovery Codes

The bootblock recovery checkpoint codes are listed in order of execution:

Checkpoint

Code Description

E0h

The onboard floppy controller if available is initialized. Next, beginning the base

512 KB memory test.

 

 

 

E1h

Initializing the interrupt vector table next.

E2h

Initializing the DMA and Interrupt controllers next.

 

 

E6h

Enabling the floppy drive controller and Timer IRQs. Enabling internal cache

memory.

 

Edh

Initializing the floppy drive.

 

 

Efh

A read error occurred while reading the floppy drive in drive A:.

F0h

Next, searching for the AMIBOOT.ROM file in the root directory.

 

 

F1h

The AMIBOOT.ROM file is not in the root directory.

F2h

Next, reading and analyzing the floppy diskette FAT to find the clusters occupied

by the AMIBOOT.ROM file.

 

 

 

F3h

Next, reading the AMIBOOT.ROM file, cluster by cluster.

F4h

The AMIBOOT.ROM file is not the correct size.

 

 

F5h

Next, disabling internal cache memory.

FBh

Next, detecting the type of flash ROM.

 

 

B-1

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Contents H8DMT/H8DMT-F H8DMT-IBX/H8DMT-IBXF H8DMT/H8DMT-IBX/H8DMT-F/H8DMT-IBXF User’s Manual Preface About this ManualManual Organization H8DMT/H8DMT-IBX/H8DMT-F/H8DMT-IBXF User’s Manual Table of Contents I/O Port and Control Panel Connections Appendix B Bios Post Checkpoint Codes Viii Checklist Chapter IntroductionOverview H8DMT/H8DMT-IBX Family Serverboard Image Images and LayoutsH8DMT-F/H8DMT-IBXF Family Serverboard Image H8DMT-IBX/H8DMT-IBXF Family Serverboard Layout Quick Reference ConnectorsJumpers LEDsCPU Serverboard FeaturesChipset Overview NVidia MCP55 Pro Chipset System Block DiagramPC Health Monitoring Power Configuration Settings Super I/O Power SupplyHeadquarters Contacting SupermicroReturning Merchandise for Service Precautions Chapter InstallationInstallation Procedure Static-Sensitive DevicesRemoving the CPU Cover Plate Processor and Heatsink InstallationPlacing the CPU into the Socket Secure the CPU with Socket Lever Mounting the Mainboard into a ChassisSide and Top Views of DDR Installation Installing MemoryI/O Port and Control Panel Connections SupportMaximum Memory Connector Definitions Power ConnectorFront Control Panel Pwon Connector Auxiliary Power ConnectorReset Connector Overheat/Fan Fail LED OHNIC2 LAN2 LED Power On LEDNMI Button Universal Serial Bus PortsUSB Headers Fan Headers Serial PortsLAN1/2 Ethernet Ports Dedicated LAN Ethernet PortChassis Intrusion Overheat LEDWake-On-LAN SMBus HeaderJumper Settings Power I2CExplanation of Jumpers Cmos Clear LAN Controller Enable/DisableBMC/Video Enable/Disable Watch Dog Enable/DisableI2C to PCI-Express Slot InfiniBand Port Enable/Disable Onboard IndicatorsPower LED InfiniBand LED IndicatorsDrive Connections Enabling Sata RAIDSata Ports Building a Driver Diskette Installing the OS/SATA DriverInstalling the OS and Drivers Installing Drivers10. Driver/Tool Installation Display Screen Troubleshooting Procedures Chapter TroubleshootingBefore Power On No PowerTechnical Support Procedures Memory ErrorsLosing the System’s Setup Configuration Frequently Asked Questions Returning Merchandise for Service Chapter Starting the Setup UtilityIntroduction Main MenuAdvanced Settings Menu Bios Features SubmenuSystem Time/System Date Last State Sata Configuration SubmenuMWDMA0. MDWDMA1, MWDMA2, UDMA0. UDMA1, UDMA2, UDMA3 PCI/PnP Configuration SubmenuAdvanced Chipset Control Submenu NorthBridge Configuration SubmenuProcessor & Clock Options Submenu SouthBridge/MCP55 Configuration SubmenuI/O Device Configuration Submenu DMI Event Logging Submenu10. Console Redirection Submenu 11. Hardware Health Monitor Submenu 12. Ipmi Configuration13. Boot Menu Boot MenuSecurity Menu 14. Security Menu15. Exit Menu Exit MenuTable A-1. Amibios Error Beep Codes Appendix a Bios Error Beep CodesH8DMT/H8DMT-IBX/H8DMT-F/H8DMT-IBXF User’s Manual Appendix B Bios Post Checkpoint Codes Bootblock Recovery CodesUncompressed Initialization Codes Chipset Last page for additional information Above 1 MB next 82h A3h Disclaimer H8DMT/H8DMT-IBX/H8DMT-F/H8DMT-IBXF User’s Manual