HP 9112 manual G i s t e r s F o r m a t, I/O Registers Map, Registers Format ∙

Page 27

3

R e g i s t e r s F o r m a t

The detailed descriptions of the register format and structure of the PCI- 9112 are specified in this chapter. This information is quite useful for the programmer who wish to handle the card by low-level program.

In addition, the low level programming syntax is introduced. This information can help the beginners to operate the PCI-9112 in the shortest learning time.

3.1I/O Registers Map

The PCI-9112 functions as 32-bit PCI target device to any master on the PCI bus. It supports burst transfer to memory space by using 32-bit data. All data read and write will base on 32-bit data.There are three types of registers on the PCI-6308: PCI Configuration Registers (PCR), Local Configuration Registers (LCR) and 9112 registers.

The PCR, which compliant to the PCI-bus specifications, is initialized and controlled by the plug & play (PnP) PCI BIOS. User‘s can study the PCI BIOS specification to understand the operation of the PCR. Please contact with PCISIG to acquire the specifications of the PCI interface.

The LCR is specified by the PCI bus controller AMCC-5933, which is provided by AMCC Corp. (www. amcc .com) It is not necessary for users to understand the details of the LCR if you use the software library.

The Table 3.1 shows the 9112 I/O address of each register with respect to the base address. The function of each register also be shown.

Registers Format ∙ 19

Image 27

Contents Page Trademarks ALL Rights ReservedAdlink Technology Inc Detailed Company InformationQuestions Page Contents 9112DblBufferTransfer 9112GetOverrunStatus ConversionConversion Digital Input and Output 9112DO 9112DA 9112ADSetChannel 9112ADSetRangePCI Scan Utility Appendix A. Demo. Programs Product Warranty/ServiceWhat do you need VR Assignment Adjustment Software UtilitiesHow to Use This Guide Features T r o d u c t i o nIntroduction ∙ Analog Output D/A SpecificationsApplications Analog Input A/DGeneral Specifications Digital I/O DIOProgrammable Counter Software Supporting Programming LibraryPCIS-LVIEW LabVIEW Driver PCIS-DDE DDE Server and InTouchTM PCIS-VEE HP-VEE DriverDAQBenchTM ActiveX Controls DASYLabTM PROInstallation ∙ InstallationWhat You Have Device Installation for Windows Systems Installation ∙Unpacking PCI -Bus Controller PCB LayoutPCI-9112 Layout ConverterPCB Layout of the PCI-9112 CPCI-9112 LayoutJumper Settings Analog Input Channel Configuration10 ∙ Installation D/A Reference Voltage Setting Clock Source Setting12 ∙ Installation Internal Reference Voltage SettingConnectors Pin Assignments CN 3 Analog Input / Output & Counter/TimerPin Assignments of PCI-9112 CN 1 Digital Signal Input DI 0 CN 2 Digital Signal Output do 014 ∙ Installation Pin Assignments of cPCI-9112 16 ∙ Installation Hardware Installation OutlineConnect with ACLD-9182 Daughter Board ConnectionConnect with ACLD-8125 Connect with ACLD-913718 ∙ Installation Connect with ACLD-9185Connect with ACLD-9138 and ACLD-9188 G i s t e r s F o r m a t I/O Registers MapRegisters Format ∙ 20 ∙ Registers Format A/D Data RegistersD/A Output Register A/D control Register Mode22 ∙ Registers Format MUX Register Bit8 ~ Bit5 Auto-Scan Bit24 ∙ Registers Format Software Trigger Register A/D Status Register26 ∙ Registers Format Digital I/O registerInternal Timer/Counter Register High Level ProgrammingLow Level Programming 28 ∙ Operation Theorem Analog Input Signal ConnectionE r a t i o n T h e o r e m A/D ConversionSingle-ended Mode Differential input modeOperation Theorem ∙ 30 ∙ Operation Theorem 4 Floating source and differential inputSoftware trigger 1 A/D Conversion ProcedureTimer Pacer Trigger 2 A/D Trigger ModesInterrupt Transfer Intx 3 A/D Data Transfer ModesExternal Trigger Software Data Transfer DrdyDMA Transfer Dmax D/A Conversion34 ∙ Operation Theorem Digital Input and OutputCounter Timer/Counter Operation36 ∙ Operation Theorem General Purpose Timer/ CounterPacer Trigger Source AddressControl Byte 38 ∙ Operation Theorem Mode DefinitionsLibraries Installation + + L i b r a r y++ Library ∙ 40 ∙ C/C++ Library Programming GuideNaming Convention Data TypesReturn Code 9112InitialSyntax Argument42 ∙ C/C++ Library 9112DI9112DI Channel Description9112DO 44 ∙ C/C++ Library 9112DA9112ADSetChannel 46 ∙ C/C++ Library 9112ADSetRangeCardnumber the card number of PCI-9112 10 9112ADSetMode48 ∙ C/C++ Library 11 9112ADSetAutoscan12 9112ADSoftTrig 50 ∙ C/C++ Library 13 9112ADAquire14 9112ADDMAStart 52 ∙ C/C++ Library 15 9112ADDMAStatus 54 ∙ C/C++ Library 16 9112ADDMAStop17 9112ContDmaStart 56 ∙ C/C++ Library 18 9112CheckHalfReady20 9112GetOverrunStatus 19 9112DblBufferTransfer58 ∙ C/C++ Library 21 9112ContDmaStop22 9112ADINTStart 60 ∙ C/C++ Library 23 9112ADINTStatus24 9112ADINTStop 25 9112ADTimer62 ∙ C/C++ Library 2MHz / c1 * c227 9112TIMERRead 26 9112TIMERStart64 ∙ C/C++ Library 28 9112TIMERStop29 9112AllocDMAMem Argument cardnumber countervalue32 9112GetSample 30 9112FreeDMAMem66 ∙ C/C++ Library Calibration What do you needCalibration ∙ Unipolar Calibration A/D AdjustmentVR Assignment Bipolar CalibrationD/A Adjustment Reference Voltage Calibration2 D/A Channel Calibration Software Utilities Software Utility70 ∙ Software Utility Software Utility ∙ System ConfigurationRunning the Utility CalibrationFunctional Testing PCI Scan Utility72 ∙ Software Utility Appendix a Demo Programs ∙ P e n d i x a . D e m o O g r a m sDOS Software Windows 95 DLL74 ∙ Appendix a Demo Programs Product Warranty/Service ∙ Product Warranty/Service