HP 9112 manual 3 A/D Data Transfer Modes, External Trigger, Software Data Transfer Drdy

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External Trigger

Through the pin-17 of CN3 (ExtTrig), the A/D conversion also can be performed when a rising edge of external signal is occurred. The conversion rate of this mode is more flexible than the previous two modes, because the users can handle the external signal by outside device. The external trigger can combine with the DMA transfer, interrupt data transfer, or even program polling data transfer. Generally, the interrupt data transfer is often used when external trigger mode is used.

4.2.3A/D Data Transfer Modes

On the PCI-9112, three A/D data transfer modes can be used when the conversion is completed. The data transfer mode is controlled by the A/D mode control bits (INTX, DMAX) of the A/D control register (BASE+18). The different transfer modes are specified as follows:

Software Data Transfer (DRDY)

Usually, this mode is used with software A/D trigger mode. After the A/D conversion is triggered by software, the software should poll the DRDY bit on the A/D Status register until it becomes to high level. Whenever the low byte of A/D data is read, the DRDY bit will be cleared to indicate the data is read out.

It is possible to read A/D converted data without polling. The A/D conversion time will not excess 8μ s on PCI-9112 card. Hence, after software trigger, the software can wait for at least 8μs then read the A/D register without polling.

Interrupt Transfer (INTX)

The PCI-9112 provides hardware interrupt capability. Under this mode, an interrupt signal is generated when the A/D conversion is ended and the data is ready to be read. It is useful to combine the interrupt transfer with the timer pacer trigger mode. Under this mode, the data transfer is essentially asynchronous with the control software.

When the interrupt transfer is used, the hardware interrupt will be inserted and its corresponding ISR (Interrupt Service Routine) will be invoked and executed after A/D conversion is completed. The converted data is transferred by the ISR program. In PCI design, the IRQ level is assigned by BIOS directly.

32 ∙ Operation Theorem

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Contents Page ALL Rights Reserved TrademarksDetailed Company Information Adlink Technology IncQuestions Page Contents Conversion Conversion Digital Input and Output9112DO 9112DA 9112ADSetChannel 9112ADSetRange 9112DblBufferTransfer 9112GetOverrunStatusAppendix A. Demo. Programs Product Warranty/Service What do you need VR Assignment AdjustmentSoftware Utilities PCI Scan UtilityHow to Use This Guide T r o d u c t i o n FeaturesIntroduction ∙ Specifications ApplicationsAnalog Input A/D Analog Output D/ADigital I/O DIO General SpecificationsProgrammable Counter Programming Library Software SupportingPCIS-LVIEW LabVIEW Driver PCIS-VEE HP-VEE Driver DAQBenchTM ActiveX ControlsDASYLabTM PRO PCIS-DDE DDE Server and InTouchTM∙ Installation InstallationWhat You Have Installation ∙ Device Installation for Windows SystemsUnpacking PCB Layout PCI-9112 LayoutConverter PCI -Bus ControllerCPCI-9112 Layout PCB Layout of the PCI-9112Analog Input Channel Configuration Jumper Settings10 ∙ Installation Clock Source Setting D/A Reference Voltage SettingInternal Reference Voltage Setting 12 ∙ InstallationCN 3 Analog Input / Output & Counter/Timer Connectors Pin AssignmentsPin Assignments of PCI-9112 CN 2 Digital Signal Output do 0 CN 1 Digital Signal Input DI 014 ∙ Installation Pin Assignments of cPCI-9112 Hardware Installation Outline 16 ∙ InstallationDaughter Board Connection Connect with ACLD-8125Connect with ACLD-9137 Connect with ACLD-9182Connect with ACLD-9185 18 ∙ InstallationConnect with ACLD-9138 and ACLD-9188 I/O Registers Map G i s t e r s F o r m a tRegisters Format ∙ A/D Data Registers 20 ∙ Registers FormatD/A Output Register Mode A/D control Register22 ∙ Registers Format Auto-Scan Bit MUX Register Bit8 ~ Bit524 ∙ Registers Format A/D Status Register Software Trigger RegisterDigital I/O register 26 ∙ Registers FormatHigh Level Programming Internal Timer/Counter RegisterLow Level Programming Analog Input Signal Connection E r a t i o n T h e o r e mA/D Conversion 28 ∙ Operation TheoremDifferential input mode Single-ended ModeOperation Theorem ∙ 4 Floating source and differential input 30 ∙ Operation Theorem1 A/D Conversion Procedure Timer Pacer Trigger2 A/D Trigger Modes Software trigger3 A/D Data Transfer Modes External TriggerSoftware Data Transfer Drdy Interrupt Transfer IntxD/A Conversion DMA Transfer DmaxDigital Input and Output 34 ∙ Operation TheoremTimer/Counter Operation CounterGeneral Purpose Timer/ Counter Pacer Trigger SourceAddress 36 ∙ Operation TheoremControl Byte Mode Definitions 38 ∙ Operation Theorem+ + L i b r a r y Libraries Installation++ Library ∙ Programming Guide Naming ConventionData Types 40 ∙ C/C++ Library9112Initial SyntaxArgument Return Code9112DI 9112DI ChannelDescription 42 ∙ C/C++ Library9112DO 9112DA 44 ∙ C/C++ Library9112ADSetChannel 9112ADSetRange 46 ∙ C/C++ Library10 9112ADSetMode Cardnumber the card number of PCI-911211 9112ADSetAutoscan 48 ∙ C/C++ Library12 9112ADSoftTrig 13 9112ADAquire 50 ∙ C/C++ Library14 9112ADDMAStart 52 ∙ C/C++ Library 15 9112ADDMAStatus 16 9112ADDMAStop 54 ∙ C/C++ Library17 9112ContDmaStart 18 9112CheckHalfReady 56 ∙ C/C++ Library19 9112DblBufferTransfer 20 9112GetOverrunStatus21 9112ContDmaStop 58 ∙ C/C++ Library22 9112ADINTStart 23 9112ADINTStatus 60 ∙ C/C++ Library25 9112ADTimer 24 9112ADINTStop2MHz / c1 * c2 62 ∙ C/C++ Library26 9112TIMERStart 27 9112TIMERRead28 9112TIMERStop 29 9112AllocDMAMemArgument cardnumber countervalue 64 ∙ C/C++ Library30 9112FreeDMAMem 32 9112GetSample66 ∙ C/C++ Library What do you need CalibrationCalibration ∙ A/D Adjustment VR AssignmentBipolar Calibration Unipolar CalibrationReference Voltage Calibration D/A Adjustment2 D/A Channel Calibration Software Utility Software Utilities70 ∙ Software Utility System Configuration Running the UtilityCalibration Software Utility ∙PCI Scan Utility Functional Testing72 ∙ Software Utility P e n d i x a . D e m o O g r a m s DOS SoftwareWindows 95 DLL Appendix a Demo Programs ∙74 ∙ Appendix a Demo Programs Product Warranty/Service Product Warranty/Service ∙