HP 9112 manual A/D control Register, Mode, 22 ∙ Registers Format

Page 30

3.4A/D control Register

This register is to control the A/D channels to be converted. It is a write only register. When the channel number is written to the register, the multiplexer switches to the new channel and wait for conversion.

Address

: BASE + 18

 

 

 

 

 

 

Attribute

: write only

 

 

 

 

 

 

Data Format:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bit

 

 

 

4

 

 

 

 

0

 

 

 

 

 

 

 

 

 

 

Base

 

MUX

Auto-

 

A/D Mode

 

 

+ 18

 

 

 

Scan

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Base

 

 

 

GAIN

 

 

 

 

M

 

 

+ 19

 

 

 

 

 

 

 

 

U

 

 

 

 

 

 

 

 

 

 

 

X

 

 

 

 

 

 

 

 

 

 

 

Base

 

 

 

---

 

 

 

-

 

 

+ 1A

 

 

 

 

 

 

 

-

 

 

 

 

 

 

 

 

 

 

-

 

 

Base

 

 

 

---

 

 

 

-

 

 

+ 1B

 

 

 

 

 

 

 

-

 

 

 

 

 

 

 

 

 

 

-

 

 

 

 

 

 

 

 

 

 

 

 

A/D Mode:

Bit 3

Bit 2

Bit 1

Bit 0

EITS

TSTS

INTX

DMA

 

 

 

X

 

 

 

 

EITS : External / Internal Trigger Source

1 : External Trigger Source

0:Internal Trigger Source TPST : Timer Pacer/ Software Trigger

1 : Timer Pacer Trigger

0 : Software Trigger

(It is only available when the Internal Trigger Source is selected) INTX: Interrupt Transfer Mode

1 : Enable Interrupt Transfer

0 : Disable Interrupt Transfer

DMAX : DMA Transfer Mode (bus mastering) 1 : Enable DMA Data Transfer

0 : Disable DMA Data Transfer

22 ∙ Registers Format

Page 29 Page 31
Image 30
Page 29 Page 31
Contents Page ALL Rights Reserved TrademarksAdlink Technology Inc Detailed Company InformationQuestions Page Contents 9112DO 9112DA 9112ADSetChannel 9112ADSetRange ConversionConversion Digital Input and Output 9112DblBufferTransfer 9112GetOverrunStatusSoftware Utilities Appendix A. Demo. Programs Product Warranty/ServiceWhat do you need VR Assignment Adjustment PCI Scan UtilityHow to Use This Guide Features T r o d u c t i o nIntroduction ∙ Analog Input A/D SpecificationsApplications Analog Output D/AGeneral Specifications Digital I/O DIOProgrammable Counter Software Supporting Programming LibraryPCIS-LVIEW LabVIEW Driver DASYLabTM PRO PCIS-VEE HP-VEE DriverDAQBenchTM ActiveX Controls PCIS-DDE DDE Server and InTouchTMInstallation ∙ InstallationWhat You Have Device Installation for Windows Systems Installation ∙Unpacking Converter PCB LayoutPCI-9112 Layout PCI -Bus ControllerCPCI-9112 Layout PCB Layout of the PCI-9112Jumper Settings Analog Input Channel Configuration10 ∙ Installation Clock Source Setting D/A Reference Voltage SettingInternal Reference Voltage Setting 12 ∙ InstallationConnectors Pin Assignments CN 3 Analog Input / Output & Counter/TimerPin Assignments of PCI-9112 CN 1 Digital Signal Input DI 0 CN 2 Digital Signal Output do 014 ∙ Installation Pin Assignments of cPCI-9112 Hardware Installation Outline 16 ∙ InstallationConnect with ACLD-9137 Daughter Board ConnectionConnect with ACLD-8125 Connect with ACLD-918218 ∙ Installation Connect with ACLD-9185Connect with ACLD-9138 and ACLD-9188 G i s t e r s F o r m a t I/O Registers MapRegisters Format ∙ A/D Data Registers 20 ∙ Registers FormatD/A Output Register A/D control Register Mode22 ∙ Registers Format Auto-Scan Bit MUX Register Bit8 ~ Bit524 ∙ Registers Format A/D Status Register Software Trigger RegisterDigital I/O register 26 ∙ Registers FormatInternal Timer/Counter Register High Level ProgrammingLow Level Programming A/D Conversion Analog Input Signal ConnectionE r a t i o n T h e o r e m 28 ∙ Operation TheoremSingle-ended Mode Differential input modeOperation Theorem ∙ 4 Floating source and differential input 30 ∙ Operation Theorem2 A/D Trigger Modes 1 A/D Conversion ProcedureTimer Pacer Trigger Software triggerSoftware Data Transfer Drdy 3 A/D Data Transfer ModesExternal Trigger Interrupt Transfer IntxD/A Conversion DMA Transfer DmaxDigital Input and Output 34 ∙ Operation TheoremTimer/Counter Operation CounterAddress General Purpose Timer/ CounterPacer Trigger Source 36 ∙ Operation TheoremControl Byte Mode Definitions 38 ∙ Operation TheoremLibraries Installation + + L i b r a r y++ Library ∙ Data Types Programming GuideNaming Convention 40 ∙ C/C++ LibraryArgument 9112InitialSyntax Return CodeDescription 9112DI9112DI Channel 42 ∙ C/C++ Library9112DO 9112DA 44 ∙ C/C++ Library9112ADSetChannel 9112ADSetRange 46 ∙ C/C++ Library10 9112ADSetMode Cardnumber the card number of PCI-911211 9112ADSetAutoscan 48 ∙ C/C++ Library12 9112ADSoftTrig 13 9112ADAquire 50 ∙ C/C++ Library14 9112ADDMAStart 52 ∙ C/C++ Library 15 9112ADDMAStatus 16 9112ADDMAStop 54 ∙ C/C++ Library17 9112ContDmaStart 18 9112CheckHalfReady 56 ∙ C/C++ Library19 9112DblBufferTransfer 20 9112GetOverrunStatus21 9112ContDmaStop 58 ∙ C/C++ Library22 9112ADINTStart 23 9112ADINTStatus 60 ∙ C/C++ Library25 9112ADTimer 24 9112ADINTStop2MHz / c1 * c2 62 ∙ C/C++ Library26 9112TIMERStart 27 9112TIMERReadArgument cardnumber countervalue 28 9112TIMERStop29 9112AllocDMAMem 64 ∙ C/C++ Library30 9112FreeDMAMem 32 9112GetSample66 ∙ C/C++ Library Calibration What do you needCalibration ∙ Bipolar Calibration A/D AdjustmentVR Assignment Unipolar CalibrationD/A Adjustment Reference Voltage Calibration2 D/A Channel Calibration Software Utilities Software Utility70 ∙ Software Utility Calibration System ConfigurationRunning the Utility Software Utility ∙Functional Testing PCI Scan Utility72 ∙ Software Utility Windows 95 DLL P e n d i x a . D e m o O g r a m sDOS Software Appendix a Demo Programs ∙74 ∙ Appendix a Demo Programs Product Warranty/Service Product Warranty/Service ∙
Top Page Image Contents