Fujitsu MB91401 manual Packet filtering function, General Purpose IO Gpio, Memory Interface

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MB91401

Prelminary

2004.11.12

 

 

•For DES-ECB/DES-CBC/3DES-ECB/3DES-CBC mode*

•For MD5/SHA-1/HMAC-MD5/HMAC-SHA-1 mode

•DH group: for 1 (MODP 768 bit) /2 (1024 bit)

For the encryption/authentication macros, a software library is available by contacting the Fujitsu sales repre- sentative as required.

* : Encryption function (DES/3DES)

Method to encrypt, and to decrypt plaintext in 64 bits with code and decoding key to 56 bits. (3DES is repeated three times. The key can be set by 168 bits or less.)

•Packet filtering function

The internal feature for L3/L4 packet filtering lets specific data pass or halts them based on address (IP/MAC address) settings. Moreover, the function (multicast address filter function) to receive the data is provided in case of the multicast address registered besides my address, too.

•IEEE 802.3 compliant 10/100M MAC

•MII interface (for full-duplex/half-duplex)

•SMI interface for PHY device control

Note : The filtering function of layer 3/4 (mount on hardware).

This feature determines whether to pass or discard packets when this layer 3 (network layer) IP addresses or layer 4 (transport layer) TCP/UDP port numbers match conditions.

•Outside interface with telecommunication facility (EXTERNAL INTERFACE)

MB91401 is equipped it with the register for the communication and with mass sending and receiving FIFO that achieves a large amount of data sending and receiving. Host functions include processing of data stored in a

3 KByte receive buffer and a 1.5 KByte transmit buffer and stopping of data reception. when the buffers become full.

This enables communication control even during data transmission and reception, thereby improving commu- nication efficiency while reducing the CPU load.

•8/16 bit data port

•Equipped with sending and receiving data port control function

•Transfer rate : 133 Mbps (Max)

•General Purpose IO (GPIO)

The interruption can be generated in the I/O port in eight bits according to changing the input signal. Moreover, the I/O setting can be done in each bit.

•Memory Interface

It is possible to connect it with an external memory.

•USB Function Controller

It can not operate as host USB.

•For USB FUNCTION Rev2.0FS

•Double Buffer Specification

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Contents Package FeaturesDescription Memory Interface Packet filtering functionGeneral Purpose IO Gpio USB Function ControllerCard Interface CompactFlash I2C InterfacePIN Assignment Index E F G H J K L M N P R T U V WPIN Number Table PIN Description GNDPin name Pin no Function/applicationICS1 OUT BreakiICS2 ICS0SOUT1 SIN1SIN0 SOUT0MB91401 Rxdv RxclkRxer RxcrsEXD15 ExcsxEXA EXD14Usbins UDPUDM UCLK48CFD10 CFD9 CFD15 CFD14 CFD13 CFD12CFD11 CFD8MB91401 Pllvdd SDASCL PllvssUSB I/O Circuit TypeType Circuit Remarks Circuit Remarks Preventing Latch-up Separation of power supply patternHandling Devices Treatment of output pins Treatment of the unused pinsTreatment of Open pins About power supply pinsConnected Specification of MB91401 and ICE Attached cable Part number RemarksRST Signal line name Wiring regulationsEvaluation MCU terminal name Pin treatment UV CCCircuit constants Description Pin name FunctionOsceb Bit data bus Holding request withdrawal demand function OFFAbout watch dog timer Treatment of Unused Input PinsAbout Mode pins MDI2 to MDI0 Operation at start-upORH AndhAndb ORBDMA Operand break Trace modeStep execution of Reti instruction Interrupt handler to NMI request toolBlock Diagram Authentication macroMemory Space General Purpose Registers Mode Register Modr Mode SettingsMode Pins RegisterFunction Remarks Bit1, bit0 WTH1, WTH0 Bus width setting bitsOperation mode MAP Address Register BlockSIDR0 R/W DRCL0 W UTIMC0 R/W TIMER0DRCL1 W UTIMC1 R/W TIMER1 UART0BSD1 Xxxxxxxx Ichrc R/WBSD0 Xxxxxxxx BsdcAddress Register Block DMASA1 Xxxxxxxx DMASA0 XxxxxxxxDMADA0 Xxxxxxxx DMADA1 XxxxxxxxDARR/W BC2RR/W Xxxxxxxx Bsrr BCRR/W CCRR/W ADRR/W1XXXXXXX 010FFFFF HSmicmdst Smistatusr SIM if Xxxxxxxx SmiintenableSMICMDR/W 00XXXXXX SIM ifExifrxrr Exifrxdr RExiftxdr W ExiftxrwFIFO3W XXXXXXXX-XXXXXXXX XXXXXXXX-XXXXXXXXFIFO1R FIFO2W XXXXXXXX-XXXXXXXX CONT1R/W XXXXX0XX-XXX00000XXXXXXXX-X0000000 XXXXXXXX-XXX00000 Interrupt Vector Interrupt Address of TBR Interrupt source OffsetDefault Interrupt Address of TBR Interrupt source Offset NMI Non Maskable InterruptMin Electrical CharacteristicsParameter Symbol Rating Unit ΣiolParameter Symbol Value Unit TypPin Conditions Value Unit Min Typ CfresetParameter TCK/TRST/TMS TDI/TDOPin Conditions Value Unit Input Levels High driven Vcrs standard range Mclko VDDE/2Usbc Unit Remarks Min Reset ParameterPin Conditions Mclko ↑ RDX Mclko ↑RDY Mclko ↑ SIN1, SIN0 SCK1, SCK0SOUT1, SOUT0 Sclk ↑Internal shift clock mode Rxer Rxclk ↑ Txen Txclk ↑Rxdv Rxclk ↑ Reception Mdio Mdclk ↑ OUT →Parameter Symbol Pin Value Unit Remarks Min External ifWrite access USB interface Parameter Symbol Pin UDP, UDMFull-speed Buffer SCL Pclk 10 I2C interfacePclk SDA PclkCFOEX, Cfiordx Card ifCFCE2X, CFCE1X CFWEX, Cfiowrx Parameter SymbolValue Unit Remarks Min Max CDWEX, CfiowrxOrdering Information Part number Package RemarksPackage Dimension Memo Europe JapanNorth and South America Asia Pacific

MB91401 specifications

The Fujitsu MB91401 microcontroller is a versatile device designed for automotive applications, embedded systems, and industrial control. It belongs to the MB91400 series, known for its robustness and efficiency. This series integrates advanced features and technologies that cater to a wide variety of real-time applications.

One of the standout features of the MB91401 is its 32-bit RISC architecture, which operates at clock speeds up to 40 MHz. This high-performance core enables rapid processing and data handling, making it suitable for demanding applications. The microcontroller is equipped with a generous amount of Flash memory, allowing developers to store essential firmware and applications directly on the chip, enhancing reliability and reducing design complexity.

Another key characteristic is its extensive memory configuration, which includes SRAM for data storage and EEPROM for non-volatile data retention. This combination provides flexibility for developers, enabling them to tailor the memory allocation based on specific application requirements.

The MB91401 is designed with a focus on peripheral integration. It features multiple I/O ports, timer units, and A/D converters, making it an ideal choice for applications that require precise timing and analog signal processing. The analog-to-digital converters offer high resolution and fast conversion speeds, which are critical in automotive and industrial control systems where accuracy is paramount.

Safety is a critical consideration in automotive applications, and the MB91401 addresses this with built-in diagnostic features and error detection capabilities. These features help ensure that the application remains functional and safe under various operating conditions.

In terms of connectivity, the microcontroller supports various communication protocols, including CAN, UART, and SPI, facilitating seamless integration with other systems and devices. This is particularly important in automotive applications where communication between different electronic control units (ECUs) is essential for overall system functionality.

The Fujitsu MB91401 is also designed for low power consumption, making it suitable for battery-operated devices and energy-sensitive applications. Its various power-saving modes allow developers to optimize the system's performance while extending operational life.

In summary, the Fujitsu MB91401 is a powerful and flexible microcontroller that combines high-performance processing with extensive peripheral support and safety features. Its robust architecture and energy-efficient design make it an excellent choice for a wide range of automotive and industrial applications, promoting both reliability and innovation in embedded system development.
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