Fujitsu MB91401 manual Treatment of Unused Input Pins, About Mode pins MDI2 to MDI0, Restrictions

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Prelminary

MB91401

2004.11.12

•Notes as device

Treatment of Unused Input Pins

It causes the malfunction that the unused input terminal is made open, and do the processing such as 1 stack or 0 stacks.

About Mode pins (MDI2 to MDI0)

Connect these pins with the input buffer by 1 to 1 to prevent the malfunction by the noise, and connect directly to VDD or VSS outside of ASIC.

Operation at start-up

Specify set initialization reset (INIT) with the terminal INITXI when you turn on the power supply.

Moreover, connect "L" level input to the terminal INITXI until the input clock is steady.

About watch dog timer

The watchdog timer function of this macro monitors a program to check whether it delays a reset within a certain period of time. If the program runs out of control and fails to delay the reset, the watchdog timer function resets the CPU.

Therefore, it keeps operating until reset is specified when the watchdog timer function is made effective once.

Exceptionally, the reset postponement is automatically done under the condition that the program execution of CPU stops. Refer to the paragraph of the function explanation of the watchdog timer for the condition of applying to this exception.

There is a possibility that watchdog reset is not generated when entering the above-mentioned state by the reckless driving of the system. In that case, please specify reset (INIT) from external INITX terminal.

Restrictions

•Clock control block

•Secure the clock stability waiting time at "L" input to INITXI.

•When entering the standby mode, use the following sequences after using the synchronous standby mode

(TBCR:set at the bit8 SYNCS bit of timebase counter control register).

(LDI

#value_of_standby, R0)

; Value_of standby is write data to STCR.

(LDI

#_STCR, R12)

; _STCR is address (481H) of STCR.

STB

R0, @R12

; Write to standby control register (STCR).

LDUB

@R12, R0

; STCR read for synchronous standby

LDUB

@R12, R0

; Dummy re-read of STCR

NOP

 

 

NOP

 

 

NOP

NOP

NOP

In addition, set the I-flag and the ILM and ICR registers to branch to an interrupt handler when the interrupt handler triggers the microcontroller to return from the standby mode.

•Please do not do the following when the monitor debugger is used.

•Please do not set the break point to the above-mentioned instruction row.

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Contents Description FeaturesPackage General Purpose IO Gpio Packet filtering functionMemory Interface USB Function ControllerI2C Interface Card Interface CompactFlashIndex E F G H J K L M N P R T U V W PIN AssignmentPIN Number Table GND PIN DescriptionFunction/application Pin name Pin noICS2 BreakiICS1 OUT ICS0SIN0 SIN1SOUT1 SOUT0MB91401 Rxer RxclkRxdv RxcrsEXA ExcsxEXD15 EXD14UDM UDPUsbins UCLK48CFD11 CFD15 CFD14 CFD13 CFD12CFD10 CFD9 CFD8MB91401 SCL SDAPllvdd PllvssType Circuit Remarks Circuit TypeUSB I/O Circuit Remarks Handling Devices Separation of power supply patternPreventing Latch-up Treatment of Open pins Treatment of the unused pinsTreatment of output pins About power supply pinsAttached cable Part number Remarks Connected Specification of MB91401 and ICEEvaluation MCU terminal name Pin treatment Signal line name Wiring regulationsRST UV CCOsceb Pin name FunctionCircuit constants Description Holding request withdrawal demand function OFF Bit data busAbout Mode pins MDI2 to MDI0 Treatment of Unused Input PinsAbout watch dog timer Operation at start-upAndb AndhORH ORBDMA Step execution of Reti instruction Trace modeOperand break Interrupt handler to NMI request toolAuthentication macro Block DiagramMemory Space General Purpose Registers Mode Pins Mode SettingsMode Register Modr RegisterOperation mode Bit1, bit0 WTH1, WTH0 Bus width setting bitsFunction Remarks Address Register Block MAPDRCL1 W UTIMC1 R/W TIMER1 DRCL0 W UTIMC0 R/W TIMER0SIDR0 R/W UART0BSD0 Xxxxxxxx Ichrc R/WBSD1 Xxxxxxxx BsdcAddress Register Block DMADA0 Xxxxxxxx DMASA0 XxxxxxxxDMASA1 Xxxxxxxx DMADA1 Xxxxxxxx1XXXXXXX Bsrr BCRR/W CCRR/W ADRR/WDARR/W BC2RR/W Xxxxxxxx 010FFFFF HSMICMDR/W Smistatusr SIM if Xxxxxxxx SmiintenableSmicmdst 00XXXXXX SIM ifExiftxdr W Exifrxdr RExifrxrr ExiftxrwFIFO1R FIFO2W XXXXXXXX-XXXXXXXX XXXXXXXX-XXXXXXXXFIFO3W XXXXXXXX-XXXXXXXX CONT1R/W XXXXX0XX-XXX00000XXXXXXXX-X0000000 XXXXXXXX-XXX00000 Interrupt Address of TBR Interrupt source Offset Interrupt VectorDefault NMI Non Maskable Interrupt Interrupt Address of TBR Interrupt source OffsetParameter Symbol Rating Unit Electrical CharacteristicsMin ΣiolTyp Parameter Symbol Value UnitParameter CfresetPin Conditions Value Unit Min Typ TCK/TRST/TMS TDI/TDOPin Conditions Value Unit Input Levels High driven Vcrs standard range Usbc VDDE/2Mclko Pin Conditions Reset ParameterUnit Remarks Min RDX Mclko ↑ Mclko ↑RDY Mclko ↑ SOUT1, SOUT0 SCK1, SCK0SIN1, SIN0 Sclk ↑Internal shift clock mode Rxdv Rxclk ↑ Txen Txclk ↑Rxer Rxclk ↑ Reception OUT → Mdio Mdclk ↑External if Parameter Symbol Pin Value Unit Remarks MinWrite access UDP, UDM USB interface Parameter Symbol PinFull-speed Buffer Pclk 10 I2C interfaceSCL Pclk SDA PclkCFCE2X, CFCE1X Card ifCFOEX, Cfiordx Value Unit Remarks Min Max Parameter SymbolCFWEX, Cfiowrx CDWEX, CfiowrxPart number Package Remarks Ordering InformationPackage Dimension Memo North and South America JapanEurope Asia Pacific

MB91401 specifications

The Fujitsu MB91401 microcontroller is a versatile device designed for automotive applications, embedded systems, and industrial control. It belongs to the MB91400 series, known for its robustness and efficiency. This series integrates advanced features and technologies that cater to a wide variety of real-time applications.

One of the standout features of the MB91401 is its 32-bit RISC architecture, which operates at clock speeds up to 40 MHz. This high-performance core enables rapid processing and data handling, making it suitable for demanding applications. The microcontroller is equipped with a generous amount of Flash memory, allowing developers to store essential firmware and applications directly on the chip, enhancing reliability and reducing design complexity.

Another key characteristic is its extensive memory configuration, which includes SRAM for data storage and EEPROM for non-volatile data retention. This combination provides flexibility for developers, enabling them to tailor the memory allocation based on specific application requirements.

The MB91401 is designed with a focus on peripheral integration. It features multiple I/O ports, timer units, and A/D converters, making it an ideal choice for applications that require precise timing and analog signal processing. The analog-to-digital converters offer high resolution and fast conversion speeds, which are critical in automotive and industrial control systems where accuracy is paramount.

Safety is a critical consideration in automotive applications, and the MB91401 addresses this with built-in diagnostic features and error detection capabilities. These features help ensure that the application remains functional and safe under various operating conditions.

In terms of connectivity, the microcontroller supports various communication protocols, including CAN, UART, and SPI, facilitating seamless integration with other systems and devices. This is particularly important in automotive applications where communication between different electronic control units (ECUs) is essential for overall system functionality.

The Fujitsu MB91401 is also designed for low power consumption, making it suitable for battery-operated devices and energy-sensitive applications. Its various power-saving modes allow developers to optimize the system's performance while extending operational life.

In summary, the Fujitsu MB91401 is a powerful and flexible microcontroller that combines high-performance processing with extensive peripheral support and safety features. Its robust architecture and energy-efficient design make it an excellent choice for a wide range of automotive and industrial applications, promoting both reliability and innovation in embedded system development.
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