Fujitsu MB91401 manual Mode Settings, Mode Pins, Mode Register Modr, Bit7 to bit2 Reserved bit

Page 32

MB91401

Prelminary

2004.11.12

 

 

■MODE SETTINGS

The FR family uses the mode pins (MDI2 to MDI0) and the mode register (MODR) to set the operation mode.

•Mode Pins

Three mode pins MDI[2], MDI[1], and MDI[0] are used to specify a mode vector fetch or test mode.

Mode pins

Mode name

Reset vector

Remarks

 

 

 

MDI2 to MDI0

access area

 

 

 

 

 

 

 

 

 

 

 

0

0

0

Reserved

 

 

 

 

 

 

 

0

0

1

external ROM mode vector

External

Bus width is set by the mode data.

 

 

 

 

 

 

0

1

0

User circuit test

FR stops (with clock signal supplied).

 

 

 

 

 

 

0

1

1

Reserved

 

 

 

 

 

 

 

1

0

0

Reserved

 

 

 

 

 

 

 

1

0

1

Reserved

 

 

 

 

 

 

 

1

1

0

Reserved

 

 

 

 

 

 

 

1

1

1

Reserved

 

 

 

 

 

 

 

Setting MDI2 to MDI0 to "010", USRTEST is set to "1" and the device operates in the user circuit test mode. The FR71 core is suspended in the user circuit test mode while SYSCLK and MCLKO are operating. The reserved modes include the FR71 core test mode. In this case, the signal at the FRTEST pin becomes "1" and enters the FR71 core test mode. If the FRTEST pin = "1", that circuit configuration is required which allows the separately defined pins of the FR71 core to be controlled and monitored from the outside of the chip.

•Mode Register (MODR)

The data written to the mode register (MODR) by hardware using a mode vector fetch is called mode data.

When this register is set by hardware, the CPU operates in the operation mode corresponding to the register setting.

The mode register is set only by an INIT-level reset cause. The user program cannot access this register.

However, as an exception, when the macro shifts to emulation mode by INTE instruction, or shifts to emulation mode by a break at a debug using ICE, this register is mapped at 0000_07FDH. Select this function when using ICE, perform the mode data setting before the program loading by writing a appropriate value to this register.

Note : No data is existed in the address (0000_07FFH ) in the mode register of the FR family.

•Register

MODR

7

6

5

4

3

2

1

0

 

Initial Value

0

0

0

0

0

0

 

WTH1

WTH0

XXXXXXXXB

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Operation mode setting bits

[bit7 to bit2] Reserved bit

Be sure to set this bit to “000000”. Setting them to any other value may result in an unpredictable operation.

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Contents Package FeaturesDescription Packet filtering function General Purpose IO GpioMemory Interface USB Function ControllerCard Interface CompactFlash I2C InterfacePIN Assignment Index E F G H J K L M N P R T U V WPIN Number Table PIN Description GNDPin name Pin no Function/applicationBreaki ICS2ICS1 OUT ICS0SIN1 SIN0SOUT1 SOUT0MB91401 Rxclk RxerRxdv RxcrsExcsx EXAEXD15 EXD14UDP UDMUsbins UCLK48CFD15 CFD14 CFD13 CFD12 CFD11CFD10 CFD9 CFD8MB91401 SDA SCLPllvdd PllvssUSB I/O Circuit TypeType Circuit Remarks Circuit Remarks Preventing Latch-up Separation of power supply patternHandling Devices Treatment of the unused pins Treatment of Open pinsTreatment of output pins About power supply pinsConnected Specification of MB91401 and ICE Attached cable Part number RemarksSignal line name Wiring regulations Evaluation MCU terminal name Pin treatmentRST UV CCCircuit constants Description Pin name FunctionOsceb Bit data bus Holding request withdrawal demand function OFFTreatment of Unused Input Pins About Mode pins MDI2 to MDI0About watch dog timer Operation at start-upAndh AndbORH ORBDMA Trace mode Step execution of Reti instructionOperand break Interrupt handler to NMI request toolBlock Diagram Authentication macroMemory Space General Purpose Registers Mode Settings Mode PinsMode Register Modr RegisterFunction Remarks Bit1, bit0 WTH1, WTH0 Bus width setting bitsOperation mode MAP Address Register BlockDRCL0 W UTIMC0 R/W TIMER0 DRCL1 W UTIMC1 R/W TIMER1SIDR0 R/W UART0Ichrc R/W BSD0 XxxxxxxxBSD1 Xxxxxxxx BsdcAddress Register Block DMASA0 Xxxxxxxx DMADA0 XxxxxxxxDMASA1 Xxxxxxxx DMADA1 XxxxxxxxBsrr BCRR/W CCRR/W ADRR/W 1XXXXXXXDARR/W BC2RR/W Xxxxxxxx 010FFFFF HSmistatusr SIM if Xxxxxxxx Smiintenable SMICMDR/WSmicmdst 00XXXXXX SIM ifExifrxdr R Exiftxdr WExifrxrr ExiftxrwXXXXXXXX-XXXXXXXX FIFO1R FIFO2W XXXXXXXX-XXXXXXXXFIFO3W XXXXXXXX-XXXXXXXX CONT1R/W XXXXX0XX-XXX00000XXXXXXXX-X0000000 XXXXXXXX-XXX00000 Interrupt Vector Interrupt Address of TBR Interrupt source OffsetDefault Interrupt Address of TBR Interrupt source Offset NMI Non Maskable InterruptElectrical Characteristics Parameter Symbol Rating UnitMin ΣiolParameter Symbol Value Unit TypCfreset ParameterPin Conditions Value Unit Min Typ TCK/TRST/TMS TDI/TDOPin Conditions Value Unit Input Levels High driven Vcrs standard range Mclko VDDE/2Usbc Unit Remarks Min Reset ParameterPin Conditions Mclko ↑ RDX Mclko ↑RDY Mclko ↑ SCK1, SCK0 SOUT1, SOUT0SIN1, SIN0 Sclk ↑Internal shift clock mode Rxer Rxclk ↑ Txen Txclk ↑Rxdv Rxclk ↑ Reception Mdio Mdclk ↑ OUT →Parameter Symbol Pin Value Unit Remarks Min External ifWrite access USB interface Parameter Symbol Pin UDP, UDMFull-speed Buffer 10 I2C interface PclkSCL Pclk SDA PclkCFOEX, Cfiordx Card ifCFCE2X, CFCE1X Parameter Symbol Value Unit Remarks Min MaxCFWEX, Cfiowrx CDWEX, CfiowrxOrdering Information Part number Package RemarksPackage Dimension Memo Japan North and South AmericaEurope Asia Pacific

MB91401 specifications

The Fujitsu MB91401 microcontroller is a versatile device designed for automotive applications, embedded systems, and industrial control. It belongs to the MB91400 series, known for its robustness and efficiency. This series integrates advanced features and technologies that cater to a wide variety of real-time applications.

One of the standout features of the MB91401 is its 32-bit RISC architecture, which operates at clock speeds up to 40 MHz. This high-performance core enables rapid processing and data handling, making it suitable for demanding applications. The microcontroller is equipped with a generous amount of Flash memory, allowing developers to store essential firmware and applications directly on the chip, enhancing reliability and reducing design complexity.

Another key characteristic is its extensive memory configuration, which includes SRAM for data storage and EEPROM for non-volatile data retention. This combination provides flexibility for developers, enabling them to tailor the memory allocation based on specific application requirements.

The MB91401 is designed with a focus on peripheral integration. It features multiple I/O ports, timer units, and A/D converters, making it an ideal choice for applications that require precise timing and analog signal processing. The analog-to-digital converters offer high resolution and fast conversion speeds, which are critical in automotive and industrial control systems where accuracy is paramount.

Safety is a critical consideration in automotive applications, and the MB91401 addresses this with built-in diagnostic features and error detection capabilities. These features help ensure that the application remains functional and safe under various operating conditions.

In terms of connectivity, the microcontroller supports various communication protocols, including CAN, UART, and SPI, facilitating seamless integration with other systems and devices. This is particularly important in automotive applications where communication between different electronic control units (ECUs) is essential for overall system functionality.

The Fujitsu MB91401 is also designed for low power consumption, making it suitable for battery-operated devices and energy-sensitive applications. Its various power-saving modes allow developers to optimize the system's performance while extending operational life.

In summary, the Fujitsu MB91401 is a powerful and flexible microcontroller that combines high-performance processing with extensive peripheral support and safety features. Its robust architecture and energy-efficient design make it an excellent choice for a wide range of automotive and industrial applications, promoting both reliability and innovation in embedded system development.
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