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User’s Manual for Advantech SOM-A2552 series module V1.00
2.2.14 System Management Bus (SM Bus) interface
SOM-A255x series SM Bus is implemented by PXA255 I2C bus. If users’CSB is powered by battery pack with SM bus battery gauge IC, then users could connect the SOM-A255x SM Bus to battery pack to monitor battery status. SOM-A255x series SM bus directly support TI BQ2040 gas gauge IC.
2.2.15 Power-input
SOM-A255x needs 3.3V & 5V DC power inputs. The power sources (3.3V,
5V) must always be supplied even in system sleep mode. SOM-A255x power management is completely implemented on itself; users’CSB doesn’t need to control the power supply to SOM-A255x.
2.2.16 Back-up power input
If user want to keep the real time clock(RTC) works well in power off mode, user should connect the coin battery positive pin to BAT-VCC in X2
directly .The back-up power pin (BAT_VCC) is the only power source to supply RTC power when SOM-A255x system power (3.3V, 5V) is off.
The coin battery must be 3.0V Li-ion coin type.
The coin battery charging circuit is designed on SOM-A255x, so user shouldn’t and needn’t design the charging circuit on CSB.
If users don’t need RTC function in CSB, just let the BAT_VCC pin open.
2.2.17 PCI I/F (Thru X3)
SOM-A2558 & SOM-A255F could support 4 channels PCI device controllers on CSB. The PCI clock is 33 MHz. PCI I/F comes from Advantech EVA-C210 I/O enhancement chip. The PCI I/F feature is as followings:
-Compatible with PCI specification version 2.2
-32-bit data bus interface
-Built-in PCI bus arbiter
-Supports up to 3 individual external bus master devices
-Support PCI Bus Controller (FPCI) to PCI slave I/O read/write, memory read/write, configuration read/write cycle
-PCI Bus master support all disconnect types (Master-Abort, Target-Abort, Target-Retry, Disconnect with data, Disconnect without data)
SOM-A2552 series don’t support PCI I/F.
