Analog Devices ADE7753 ,

ADE7753

–17–

REV. PrC 01/02

PRELIMINARY TECHNICAL DATA

CHANNEL 2 ADCCHANNEL 2 ADC

CHANNEL 2 ADC

Channel 2 SamplingChannel 2 Sampling

Channel 2 Sampling

In Channel 2 waveform sampling mode (MODE[14:13] =

1,1 and WSMP = 1) the ADC output code scaling for

Channel 2 is not the same as Channel 1. The LSB weight of

the Channel 2 samples is 16 times that of the Channel 1.

Channel 2 waveform sample is a 16-bit word and sign

extended to 24 bits. The absolute full-scale value of the ADC

swings between 4000h (16,384 Decimal) and C000h (-

16,384 Decimal) – see ADC Channel 1. For normal operation,

the differential voltage signal between V2P and V2N should

not exceed 0.5V. The outputs from the ADC should be within

63% of the maximum, i.e. swings between 2852h (10,322

Decimal) and D7AEh (-10,322 Decimal). However, before

being passed to the Waveform register, the ADC output is

passed through a single pole, low pass filter with a cutoff

frequency of 140Hz. The plots in Figure 24 shows the

magnitude and phase response of this filter.

-90

-80

-70

-60

-50

-40

-30

-20

-10

-18

-16

-14

-12

-10

-8

-6

-4

-2

Gain (dBs)

Phase (°)

Frequency (Hz)

60 Hz, -0.73dB

50 Hz, -0.52dB

60 Hz, -23.2°

50 Hz, -19.7°

Figure 24 – Magnitude & Phase response of LPF1

The LPF1 has the effect of attenuating the signal. For

example if the line frequency is 60Hz, then the signal at the

output of LPF1 will be attenuated by about 8%.





dB

Hz

Hz 7309190

140

60

1

2..)f(H -==

+

=

Note LPF1 does not affect the power calculation. The signal

processing chain in Channel 2 is illustrated in Figure 25.

Unlike Channel 1, Channel 2 has only one analog input range

(1V differential). However like Channel 1, Channel 2 does

have a PGA with gain selections of 1, 2, 4, 8 and 16. For

energy measurement, the output of the ADC is passed

directly to the multiplier and is not filtered. A HPF is not

required to remove any DC offset since it is only required to

remove the offset from one channel to eliminate errors due to

offsets in the power calculation. When in waveform sample

mode, one of four output sample rates can be chosen by using

bits 11 and 12 of the Mode register. The available output

sample rates are 27.9kSPS, 14kSPS, 7kSPS or 3.5kSPS—

see Mode Register. The interrupt request output IRQ signals a

sample availability by going active low. The timing is the

same as that for Channel 1 and is shown in Figure 22.

Channel 1 RMS calculationChannel 1 RMS calculation

Channel 1 RMS calculation

Root Mean Square (RMS) value of a continuous signal V(t)

is defined as:

()

∫

⋅=

rms dttV

T

V

1

(1)

For time sampling signals, rms calculation involves squaring

the signal, taking the average and obtaining the square root:

∑

⋅= N

rms iV

N

V

2)(

1 (2)

ADE7753 calculates simultaneously the RMS values for

Channel 1 and Channel 2 in different register. Figure 23

shows the detail of the signal processing chain for the RMS

calculation on channel 1. The channel 1 RMS value is

processed from the samples used in the channel 1 waveform

sampling mode. The channel 1 RMS value is stored in an

unsigned 24-bit register (IRMS). One LSB of the channel 1

RMS register is equivalent to one LSB of a channel 1

waveform sample. The update rate of the channel 1 RMS

measurement is CLKIN/4.

LPF3

-63% to +63% FS

Current Signal - i(t)

2851ECh

D7AE14h

00h ~45% FS

Irms(t)

1C82B3h

00h

IRMS

Channel 1 Σ

SIGN2

IRMSOS[11:0]

HPF

Figure 23 - Channel 1 RMS signal processing

With the specified full scale analog input signal of 0.5V, the

ADC will produce an output code which is approximately

63% of its full-scale value (i.e. ±2,642,412d) - see Channel 1

ADC. The equivalent RMS values of a full-scale AC signal is

1,868,467d (1C82B3h).

Channel 1 RMS offset compensationChannel 1 RMS offset compensation

Channel 1 RMS offset compensation

The ADE7753 incorporates a channel 1 RMS offset compen-

sation register (IRMSOS). This is 12-bit signed registers

which can be used to remove offset in the channel 1 RMS

calculation. An offset may exist in the RMS calculation due

to input noises that are integrated in the DC component of

(t). The offset calibration will allow the content of the

IRMS register to be maintained at zero when no input is

present on channel 1.

1 LSB of the Channel 1 RMS offset are equivalent to 32,768

LSB of the square of the Channel 1 RMS register. Assuming

that the maximum value from the Channel 1 RMS calcula-

tion is 1,868,467d with full scale AC inputs, then 1 LSB of

the channel 1 RMS offset represents 0.46% of measurement

error at -60dB down of full scale.

32768

0×+= IRMSOSII rmsrms

where I

rmso

is the RMS measurement without offset correc-

tion.