Connect Tech FreeForm/PCI-104 User Manual
Revision 0.02 36
Appendix C: Hardware Changes from Revision B This appendix lists the changes between hardware revision B and hardware revision C.
The following is a summary of changes:
PCB requires only 5V over PCI-104; it previously required 3.3V and 5V
A dedicated local bus oscillator was added to generate 50Mhz. A clock is no longer forwarded
from FPGA to the PLX PCI 9056.
The DDR2 FPGA pinout has been changed to increase timing margins
The pinout of connector P4 (high-speed serial) has changed. The sideband signals have been
relocated and 3.3V has been added.
The orientation of connector P5 (RS-485 port 0) has rotated 180 degrees
The Location of P8 (external power connector) has changed. The 3.3V enable signal has also
been removed