Connect Tech PCI-104 user manual Fpga Configuration

Connect Tech FreeForm/PCI-104 User Manual

FPGA Configuration

The Virtex-5 FPGA can be configured via two methods:

oJTAG programming chain, using P2

oSPI Flash, read on, power-up by FPGA

The configuration flash can be programmed (loaded) through three methods:

oJTAG programming chain (through FPGA), using P2 o Direct with cable, using P3

o Indirect programming through FPGA, only possible after configuration is complete (refer to reference design for more details)

To configure the FPGA via the JTAG / boundary scan programming chain, three items are required:

oFPGA bitstream (*.bit), generated at end FPGA implementation using ISE o PLX 9056 boundary scan definition file (*.bdsl)

o Ethernet PHY boundary scan definition file

To program the SPI flash, a hex file must be generated (*.mcs) then written to the flash. To generate the hex file, the following is required:

oFPGA Bitstream

oSetting PROM file format to MCS (important since bits are swapped) o Setting SPI PROM density to 16M

o Setting SPI Flash type to M25P16

For a complete procedure, refer to Appendix A.

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