Cypress CY14B101L manual Features, Functional Description, Logic Block Diagram

CY14B101L

1 Mbit (128K x 8) nvSRAM

Features

■25 ns, 35 ns, and 45 ns access times

■Pin compatible with STK14CA8

■Hands off automatic STORE on power down with only a small capacitor

■STORE to QuantumTrap™ nonvolatile elements is initiated by software, hardware, or AutoStore™ on power down

■RECALL to SRAM initiated by software or power up

■Unlimited READ, WRITE, and RECALL cycles

■200,000 STORE cycles to QuantumTrap

■20 year data retention at 55°C

■Single 3V +20%, –10% operation

■Commercial and industrial temperature

■32-pin (300 mil) SOIC and 48-pin (300 mil) SSOP packages

■RoHS compliance

Functional Description

The Cypress CY14B101L is a fast static RAM with a nonvolatile element in each memory cell. The embedded nonvolatile elements incorporate QuantumTrap technology producing the world’s most reliable nonvolatile memory. The SRAM provides unlimited read and write cycles, while independent, nonvolatile data resides in the highly reliable QuantumTrap cell. Data transfers from the SRAM to the nonvolatile elements (the STORE operation) takes place automatically at power down. On power up, data is restored to the SRAM (the RECALL operation) from the nonvolatile memory. Both the STORE and RECALL operations are also available under software control.

Logic Block Diagram

A5
A6	DECODER
A12
A7
A8
A9
A13	ROW
A14
A15
A16
DQ0
DQ1	BUFFERS
DQ2
DQ3
DQ4	INPUT
DQ6
DQ5
DQ7

Cypress Semiconductor Corporation

	QuantumTrap		VCC	VCAP
	1024 x 1024		POWER
	STORE		CONTROL
	RECALL		STORE/
	STATIC RAM		RECALL		HSB
	ARRAY
			CONTROL
	1024 X 1024
				SOFTWARE		A15 - A0
				DETECT
COLUMN IO
COLUMN DEC
A0 A1 A2 A3 A4 A10 A11
						OE
						CE
						WE
•	198 Champion Court	•	San Jose, CA 95134-1709			•	408-943-2600

Document Number: 001-06400 Rev. *I Revised January 30, 2009

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