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CY14B101Q1, CY14B101Q2, CY14B101Q3
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PRELIMINARY
CY14B101Q1
CY14B101Q2
CY14B101Q3
Document #: 001-50091 Rev. *A
Page 21 of 22
Figure 28. 16-Pin (300 mil) SOIC (51-85022)
Package Diagrams
(continued)
51-85022 *B
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Contents
Main
1 Mbit (128K x 8) Serial SPI nvSRAM
CY14B101Q1 CY14B101Q2 CY14B101Q3
Features
Functional Overview
Logic Block Diagram
CY14B101Q2
Pinouts
CY14B101Q3
Device Operation
SRAM Write
SRAM Read
STORE Operation
CY14B101Q1 CY14B101Q2 CY14B101Q3
Software Store Operation
Hardware STORE and HSB pin Operation
RECALL Operation
Hardware Recall (Power Up)
Serial Peripheral Interface
SPI Overview
SPI Modes
SPI Operating Features
Power Up
Power On Reset
Power Down
Active Power and Standby Power Modes
Status Register
Read Status Register (RDSR) Instruction
Write Status Register (WRSR) Instruction
Write Protection and Block Protection
Write Enable (WREN) Instruction
Write Disable (WRDI) Instruction
Block Protection
CY14B101Q1 CY14B101Q2 CY14B101Q3
Write Protect (WP) Pin
Memory Access
Read Sequence (READ)
Write Sequence (WRITE)
nvSRAM Special Instructions
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HI-Z
A16 A3 A1A2 A0
0000001 0000
Software RECALL
AutoStore Disable (ASDISB)
AutoStore Enable (ASENB)
HOLD Pin Operation
Maximum Ratings
DC Electrical Characteristics
CY14B101Q1 CY14B101Q2 CY14B101Q3
AC Test Conditions
Data Retention and Endurance
Capacitance
Thermal Resistance
~
Document #: 001-50091 Rev. *A Page 16 of 22
AutoStore or Power Up RECALL
Switching Waveforms
Figure 23. AutoStore or Power Up RECALL
Software Controlled STORE and RECALL Cycles
Switching Waveforms
Page
Ordering Information
Part Numbering Nomenclature
Page
Page
Document History Page
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PSoC Solutions