51-85160 | Cypress CY14B108N, CY14B108L specification

PRELIMINARY	CY14B108L, CY14B108N

Figure 17. 54-Pin TSOP II (51-85160)

Document #: 001-45523 Rev. *B

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Contents

Functional Description FeaturesLogic Block Diagram1, 2 Cypress Semiconductor Corporation Top View PinoutsNot to scale Byte Low Enable, Active LOW . Controls DQ 7 DQ Output Enable, Active LOW . The active LO WByte High Enable, Active LOW . Controls DQ 15 DQ Power Supply Inputs to the Device Sram Write Device OperationSram Read AutoStore Operation Software Store Hardware Recall Power UpSoftware Recall Store Mode SelectionRecall Noise Considerations Preventing AutoStoreData Protection Best Practices Operating Range DC Electrical CharacteristicsMaximum Ratings Range Thermal Resistance Data Retention and EnduranceCapacitance AC Test Conditions Parameters Sram Read Cycle AC Switching CharacteristicsSwitching Waveforms Sram Write Cycle Sram Read Cycle #2 CE and OE Controlled3, 11 Sram Write Cycle #2 AutoStore/Power Up Recall Parameters Description 20 ns 25 ns 45 ns Unit Min Max Software Controlled STORE/RECALL Cycle Description 20 ns 25 ns 45 ns Unit Min Max To Output Active Time when write latch not setHardware Store Cycle Hardware Store Pulse Width Truth Table For Sram Operations Inputs/Outputs Mode PowerHigh Z CY14B108N-ZSP20XIT Ordering InformationCY14B108N-ZSP20XCT CY14B108N-ZSP25XCT CY14B108N-ZSP45XCT CY14B108N-ZSP45XIT ZS Tsop Part Numbering NomenclatureCY 14 B 108L-ZS P 20 X C T Nvsram Package Diagrams Pin Tsop II Ball Fbga 6 mm x 10 mm x 1.2 mm 51-85160 Gvch Document HistoryGVCH/PYRS Sales, Solutions, and Legal Information USB