Cypress CY62136EV30 manual

2-Mbit (128K x 16) Static RAM

CY62136EV30

MoBL®

CypressSemiconductor Corporation • 198 Champion Court • San Jose,CA 95134-1709 • 408-943-2600

Document #: 38-05569 Rev. *B Revised January 6, 2006

Features

• Very high speed: 45 ns

• Wide voltage range: 2.20V–3.60V

• Pin-compatible with CY62136CV30

• Ultra low standby power

— Typical standby current: 1µA

— Maximum standby current: 7µA

• Ultra-low active power

— Typical active current: 2 mA @ f = 1 MHz

• Easy memory expansion with CE, and OE features

• Automatic power-down when deselected

• CMOS for optimum speed/power

• Offered in a Pb-free 48-ball VFBGA and 44-pin TSOP II

packages

Functional Description[1]

The CY62136EV30 is a high-performance CMOS static RAM

organized as 128K words by 16 bits. This device features

advanced circuit design to provide ultra-low active current.

This is ideal for providing More Battery Life™ (MoBL®) in

portable applications such as cellular telephones. The device

also has an automatic power-down feature that significantly

reduces power consumption by 80% when addresses are not

toggling. The device can also be put into standby mode

reducing power consumption by more than 99% when

deselected (CE HIGH). The input/output pins (I/O0 through

I/O15) are placed in a high-impedance state when: deselected

(CE HIGH), outputs are disabled (OE HIGH), both Byte High

Enable and Byte Low Enable are disabled (BHE, BLE HIGH),

or during a write operation (CE LOW and WE LOW).

Writing to the device is accomplished by taking Chip Enable

(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable

(BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is

written into the location specified on the address pins (A0

through A16). If Byte High Enable (BHE) is LOW, then data

from I/O pins (I/O8 through I/O15) is written into the location

specified on the address pins (A0 through A16).

Reading from the device is accomplished by taking Chip

Enable (CE) and Output Enable (OE) LOW while forcing the

Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,

then data from the memory location specified by the address

pins will appear on I/O0 to I/O7. If Byte High Enable (BHE) is

LOW, then data from memory will appear on I/O8 to I/O15. See

the truth table at the back of this data sheet for a complete

description of read and write modes.

Note:

1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.

Logic Block Diagram

128K x 16

RAM Array I/O0–I/O7

ROW DECODER

COLUMN DECODER

A11

A12

A13

A14

A15

SENSE AMPS

DATA IN DRIVERS

A3I/O8–I/O15

BLE

BHE

A16

A10

[+] Feedback