Cypress CY62158EV30 CY62158EV30 MoBL

CY62158EV30 MoBL®

Document #: 38-05578 Rev. *D Page 8 of 11

Write Cycle No. 3 (WE Controlled, OE LOW)[19]

Truth Table

CE1CE2WE OE Inputs/Outputs Mode Power

H X X X High Z Deselect/Power Down Standby (ISB)

X L X X High Z Deselect/Power Down Standby (ISB)

L H H L Data Out Read Active (ICC)

L H H H High Z Output Disabled Active (ICC)

L H L X Data in Write Active (ICC)

Ordering Information

Speed

(ns) Ordering Code Package

Diagram Package Type Operating

Range

45 CY62158EV30LL-45BVXI 51-85150 48-ball Very Fine Pitch Ball Grid Array (Pb-free) Industrial

CY62158EV30LL-45ZSXI 51-85087 44-pin TSOP II (Pb-free)

Switching Waveforms (continued)

VALID DATA

tHD

tSD

tLZWE

tPWE

tSA

tHA

tAW

tSCE

tWC

tHZWE

NOTE 20

CE1

ADDRESS

CE2

DATA IO

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Contents

Main 8-Mbit (1024K x 8) Static RAM CY62158EV30 MoBL Features Functional Description Logic Block Diagram CY62158EV30 MoBL Pin Configurations Product Product Portfolio VCC Range (V) Speed (ns) CY62158EV30 MoBL Maximum Ratings Operating Range Electrical Characteristics Capacitance Thermal Resistance AC Test Loads and Waveforms Data Retention Characteristics Data Retention Waveform CY62158EV30 MoBL Switching Characteristics CY62158EV30 MoBL Switching Waveforms Read Cycle No. 2 (OE Controlled)[16, 17] Read Cycle No. 1 (Address Transition Controlled)[15, 16] Document #: 38-05578 Rev. *D Page 7 of 11 Write Cycle No. 1 (WE Controlled)[14, 18, 19] Write Cycle No. 2 (CE1 or CE2 Controlled)[14, 18, 19] CY62158EV30 MoBL Truth Table Ordering Information Switching Waveforms Package Diagrams Figure 1. 48-Ball VFBGA (6 x 8 x 1 mm), 51-85150 51-85150-*D Page Document History Page