Cypress CY62167E MoBL Document History Page

CY62167E MoBL®

Document #: 001-15607 Rev. *A Page 12 of 12

Document History Page

Document Title: CY62167E MoBL® 16-Mbit (1M x 16 / 2M x 8) Static RAM

Document Number: 001-15607

REV. ECN NO. Issue Date Orig. of

Change Description of Change

** 1103145 See ECN VKN New Data Sheet

*A 1138903 See ECN VKN Converted from prelimina ry to final

Changed ICC(max) spec from 2.8 mA to 4.0 mA for f=1MHz

Changed ICC(typ) spec from 22 mA to 25 mA for f=fmax

Changed ICC(max) spec from 25 mA to 30 mA for f=fmax

Added footnote# 8 related to VIL

Changed ICCDR spec from 10 µA to 12 µA

Added footnote# 14 related to AC timing parameters

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Contents

Main 16-Mbit (1M x 16 / 2M x 8) Static RAM CY62167E MoBL Features Functional Description Logic Block Diagram CY62167E MoBL Document #: 001-15607 Rev. *A Page 2 of 12 Pin Configuration 48-Pin TSOP I Product Portfolio Maximum Ratings Operating Range Electrical Characteristics Capacitance Thermal Resistance AC Test Loads and Waveforms Data Retention Characteristics Data Retention Waveform Switching Characteristics CY62167E MoBL Document #: 001-15607 Rev. *A Page 6 of 12 Switching Waveforms Figure 2 shows OE controlled read cycle waveforms.[19, 20] Figure 2. Read Cycle No. 2 CY62167E MoBL Document #: 001-15607 Rev. *A Page 7 of 12 Figure 3 shows WE controlled write cycle waveforms.[17, 21, 22] Figure 3. Write Cycle No. 1 Figure 4 shows CE1 or CE2 controlled write cycle waveforms.[17, 21, 22] Figure 4. Write Cycle No. 2 Figure 5 shows WE controlled, OE LOW write cycle waveforms.[22] Figure 5. Write Cycle No. 3 t Figure 6 shows BHE/BLE controlled, OE LOW write cycle waveforms.[22] Figure 6. Write Cycle No. 4 Truth Table Ordering Information Package Diagram Figure 7. 48-Pin TSOP I (12 mm x 18.4 mm x 1.0 mm), 51-85183 Document History Page