CY62167E MoBL®
Document #: 001-15607 Rev. *A Page 3 of 12
Maximum Ratings
Exceeding the maximum ratings may shorten the battery life
of the device. User guidelines are not tested.
Storage Temperature ................................–65°C to + 150°C
Ambient Temperature with
Power Applied............................................–55°C to + 125°C
Supply Voltage to Ground
Potential...........................................................–0.5V to 6.0V
DC Voltage Applied to Outputs
in High-Z State[5, 6]...........................................–0.5V to 6.0V
DC Input Voltage[5, 6]........................................–0.5V to 6.0V
Output Current into Outputs (LOW) ............................20 mA
Static Discharge Voltage........................................... >2001V
(MIL-STD-883, Method 3015)
Latch Up Current.....................................................>200 mA
Operating Range
Device Range Ambient
Temperature VCC[7]
CY62167ELL Industrial –40°C to +85°C 4.5V to 5.5V
Electrical Characteristics
Over the Operating Range
Parameter Description Test Conditions 45 ns Unit
Min Typ[4] Max
VOH Output HIGH Voltage IOH = –1.0 mA 2.4 V
VOL Output LOW Voltage IOL = 2.1mA 0.4 V
VIH Input HIGH Voltage VCC = 4.5V to 5.5V 2.2 VCC + 0.5V V
VIL Input LOW Voltage VCC = 4.5V to 5.5V –0.5 0.7[8] V
IIX Input Leakage Current GND < VI < VCC –1 +1 µA
IOZ Output Leakage Current GND < VO < VCC, Output Disabled –1 +1 µA
ICC VCC Operating Supply
Current
f = fMAX = 1/tRC VCC = VCC(max)
IOUT = 0 mA
CMOS levels
25 30 mA
f = 1 MHz 2.2 4.0 mA
ISB2[9] Automatic CE Power Down
Current—CMOS Inputs
CE1 > VCC – 0.2V or CE2 < 0.2V,
VIN > VCC – 0.2V or VIN < 0.2V,
f = 0, VCC = VCC(max)
1.5 12 µA
Capacitance[10]
Parameter Description Test Conditions Max Unit
CIN Input Capacitance TA = 25°C, f = 1 MHz,
VCC = VCC(typ)
10 pF
COUT Output Capacitance 10 pF
Thermal Resistance[10]
Parameter Description Test Conditions TSOP I Unit
ΘJA Thermal Resistance
(junction to ambient)
Still air, soldered on a 3 × 4.5 inch, two-layer printed circuit
board
60 °C/W
ΘJC Thermal Resistance
(junction to case)
4.3 °C/W
Notes
5. VIL(min) = –2.0V for pulse durations less than 20 ns.
6. VIH(max) = VCC + 0.75V for pulse durations less than 20 ns.
7. Full Device AC operation is based on a 100 µs ramp time from 0 to VCC (min) and 200 µs wait time after VCC stabilization.
8. Under DC conditions the device meets a VIL of 0.8V. However, in dynamic conditions Input LOW Voltage applied to the device must not be higher than 0.7V.
9. Only chip enables (CE1 and CE2), byte enables (BHE and BLE) and BYTE need to be tied to CMOS levels to meet the ISB2 / ICCDR spec. Other inputs can be
left floating.
10.Tested initially and after any design or process changes that may affect these parameters.
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