Referenced with Respect to, TDO for Jtag

CY7C1310BV18, CY7C1910BV18

Pin Description

Echo Clock

CQ Referenced with Respect to C. This is a free - running clock and is synchronized to the Input clock

for output data (C) of the QDR-II. In the single clock mode, CQ is generated with respect to K. The timings

for the echo clocks is shown in the Switching Characteristics on page 23.

Echo Clock

Referenced with Respect to

. This is a free - running clock and is synchronized to the Input clock

for output data (C) of the QDR-II. In the single clock mode, CQ is generated with respect to K. The timings

for the echo clocks is shown in the Switching Characteristics on page 23.

Input

Output Impedance Matching Input. This input is used to tune the device outputs to the system data bus

impedance. CQ, CQ, and Q[x:0] output impedance are set to 0.2 x RQ, where RQ is a resistor connected

between ZQ and ground. Alternatively, this pin can be connected directly to VDDQ, which enables the

minimum impedance mode. This pin cannot be connected directly to GND or left unconnected.

Input

DLL Turn Off − Active LOW. Connecting this pin to ground turns off the DLL inside the device. The timing

in the DLL turned off operation differs from those listed in this data sheet.

TDO

Output

TCK

Input

TDI

Input

TMS

Input