CY7C1338GDocument #: 38-05521 Rev. *D Page 13 of 17
Read/Write Timing[17, 19, 20]
Notes:
19.The data bus (Q) remains in high-Z following a WRITE cycle, unless a new read access is initiated by ADSP or ADSC.
20.GW is HIGH.
Timing Diagrams (continued)
t
CYC
tCL
CLK
tADH
tADS
ADDRESS
tCH
tAH
tAS
A2
tCEH
tCES
Single WRITE
D(A3)
A3 A4
BURST READ
Back-to-Back READs
High-Z
Q(A2) Q(A4) Q(A4+1)
Q(A4+2)
Q(A4+3)
tWEH
tWES
tOEHZ
tDH
tDS
tCDV
tOELZ
A1 A5 A6
D(A5) D(A6)
Q(A1)
Back-to-Back
WRITEs
DON’T CARE UNDEFINED
ADSP
ADSC
BWE, BW[A:D]
CE
ADV
OE
Data In (D)
Data Out (Q)