ZZ Mode Timing 22, DON’T Care | Cypress CY7C1339G guide

CY7C1339G

ZZ Mode Timing [22, 23]

CLK

tZZ

tZZI

ISUPPLY

I DDZZ

ALL INPUTS (except ZZ)

Outputs (Q)

High-Z

tZZREC

tRZZI

DESELECT or READ Only

Notes:

22.Device must be deselected when entering ZZ mode. See Cycle Descriptions table for all possible signal conditions to deselect the device.

23.DQs are in high-Z when exiting ZZ sleep mode.

Document #: 38-05520 Rev. *F

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Contents

Functional Description1 FeaturesLogic Block Diagram Cypress Semiconductor Corporation CY7C1339G Pin ConfigurationsSelection Guide 250 MHz 200 MHz 166 MHz 133 MHz Unit Name Description Pin Configurations Ball BGA PinoutPin Definitions Byte Write Select Inputs, active LOW. Qualified with Functional Overview ZZ Mode Electrical Characteristics Interleaved Burst Address Table Mode = Floating or VDDLinear Burst Address Table Mode = GND Operation Add. Used Adsp Adsc ADV Write CLK BWE BW D BW C BW B BW a Partial Truth Table for Read/Write 2Function Ambient Range Maximum RatingsOperating Range AC Test Loads and Waveforms Capacitance11Thermal Resistance11 Tqfp BGA Clock 250 200 166 133 Parameter Description Unit Min MaxMin Max Output Times Switching Waveforms Read Cycle Timing18 Write Cycle Timing18 Read/Write Cycle Timing18, 20 ZZ Mode Timing 22 DON’T Care Ordering Information Package Diagrams Pin Tqfp 14 x 20 x 1.4 mm Ball BGA 14 x 22 x 2.4 mm 90±0.05 REV ECN no Issue Date Orig. Description of ChangeDocument History