Cypress CY7C1345G Maximum Ratings, Operating Range, Electrical Characteristics, Range Ambient

CY7C1345G

Maximum Ratings

Exceeding the maximum ratings may shorten the battery life of the device. These user guidelines are not tested.

Storage Temperature		–65°C to +150°C
Ambient Temperature with
Power Applied		–55°C to +125°C
Supply Voltage on VDD Relative to GND		–0.5V to +4.6V
Supply Voltage on VDDQ Relative to GND		–0.5V to +VDD
DC Voltage Applied to Outputs
in tri-state	–0.5V to VDDQ + 0.5V

DC Input Voltage	...................................	–0.5V to VDD + 0.5V
Current into Outputs (LOW)			20 mA
Static Discharge Voltage
(MIL-STD-883, Method 3015)			>2001V
Latch up Current			>200 mA
Operating Range
Range	Ambient	VDD	VDDQ
	Temperature
Commercial	0°C to +70°C	3.3V	2.5V –5%
		−5%/+10%	to VDD
Industrial	–40°C to +85°C

Electrical Characteristics

Over the Operating Range [7, 8]

Parameter	Description	Test Conditions		Min	Max	Unit
VDD	Power Supply Voltage			3.135	3.6	V
VDDQ	IO Supply Voltage			2.375	VDD	V
VOH	Output HIGH Voltage	for 3.3V IO, IOH = –4.0 mA		2.4		V
		for 2.5V IO, IOH = –1.0 mA		2.0		V
VOL	Output LOW Voltage	for 3.3V, IO, IOL= 8.0 mA			0.4	V
		for 2.5V IO, IOL = 1.0 mA			0.4	V
VIH	Input HIGH Voltage	for 3.3V IO		2.0	VDD + 0.3V	V
		for 2.5V IO		1.7	VDD + 0.3V	V
VIL	Input LOW Voltage[7]	for 3.3V IO		–0.3	0.8	V
		for 2.5V IO		–0.3	0.7	V
IX	Input Leakage Current except	GND ≤ VI ≤ VDDQ		−5	5	∝A
	ZZ and MODE
	Input Current of MODE	Input = VSS		–30		∝A
		Input = VDD			5	∝A
	Input Current of ZZ	Input = VSS		–5		∝A
		Input = VDD			30	∝A
IOZ	Output Leakage Current	GND ≤ VI ≤ VDDQ, Output Disabled		–5	5	∝A
IDD	VDD Operating Supply Current	VDD = Max, IOUT = 0 mA,	7.5 ns cycle, 133 MHz		225	mA
		f = fMAX= 1/tCYC
			10 ns cycle, 100 MHz		205	mA
ISB1	Automatic CE Power down	Max VDD, Device Deselected,	7.5 ns cycle, 133 MHz		90	mA
	Current—TTL Inputs	VIN ≥ VIH or VIN ≤ VIL, f = fMAX,
			10 ns cycle, 100 MHz		80	mA
		inputs switching
ISB2	Automatic CE Power down	Max VDD, Device Deselected,	All speeds		40	mA
	Current—CMOS Inputs	VIN ≥ VDD – 0.3V or VIN ≤ 0.3V,
		f = 0, inputs static
ISB3	Automatic CE Power down	Max VDD, Device Deselected,	7.5 ns cycle, 133 MHz		75	mA
	Current—CMOS Inputs	VIN ≥ VDDQ – 0.3V or VIN ≤
			10 ns cycle, 100 MHz		65	mA
		0.3V, f = fMAX, inputs switching
ISB4	Automatic CE Power down	Max VDD, Device Deselected,	All speeds		45	mA
	Current—TTL Inputs	VIN ≥ VDD – 0.3V or VIN ≤ 0.3V,
		f = 0, inputs static

Notes

7.Overshoot: VIH(AC) < VDD +1.5V (Pulse width less than tCYC/2), undershoot: VIL(AC) > –2V (Pulse width less than tCYC/2).

8.TPower up: Assumes a linear ramp from 0V to VDD(min) within 200 ms. During this time VIH < VDD and VDDQ < VDD.

Document Number: 38-05517 Rev. *E Page 10 of 20